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git01.mediatek.com / filogic / uboot / 1234ce736c362fe962aba9f3a07ba4601bf69e4b / . / board / amcc / yosemite / init.S
blob: d23cdc79d0decd5f1f7a66a465a585c881b8b361 [file] [log] [blame]
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]1/*
2*
3* See file CREDITS for list of people who contributed to this
4* project.
5*
6* This program is free software; you can redistribute it and/or
7* modify it under the terms of the GNU General Public License as
8* published by the Free Software Foundation; either version 2 of
9* the License, or (at your option) any later version.
10*
11* This program is distributed in the hope that it will be useful,
12* but WITHOUT ANY WARRANTY; without even the implied warranty of
13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14* GNU General Public License for more details.
15*
16* You should have received a copy of the GNU General Public License
17* along with this program; if not, write to the Free Software
18* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19* MA 02111-1307 USA
20*/
21
Wolfgang Denk0191e472010-10-26 14:34:52 +0200[diff] [blame]22#include <asm-offsets.h>
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]23#include <ppc_asm.tmpl>
Stefan Roese94b62702010-04-14 13:57:18 +0200[diff] [blame]24#include <asm/mmu.h>
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]25#include <config.h>
26
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]27/**************************************************************************
28 * TLB TABLE
29 *
30 * This table is used by the cpu boot code to setup the initial tlb
31 * entries. Rather than make broad assumptions in the cpu source tree,
32 * this table lets each board set things up however they like.
33 *
34 * Pointer to the table is returned in r1
35 *
36 *************************************************************************/
37
38 .section .bootpg,"ax"
39 .globl tlbtab
40
41tlbtab:
42 tlbtab_start
Stefan Roese1d026382005-08-11 18:03:14 +0200[diff] [blame]43
44 /*
45 * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
46 * speed up boot process. It is patched after relocation to enable SA_I
47 */
Stefan Roese94b62702010-04-14 13:57:18 +0200[diff] [blame]48 tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/)
Stefan Roese1d026382005-08-11 18:03:14 +0200[diff] [blame]49
50 /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
Stefan Roese94b62702010-04-14 13:57:18 +0200[diff] [blame]51 tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G )
Stefan Roese1d026382005-08-11 18:03:14 +0200[diff] [blame]52
Stefan Roese94b62702010-04-14 13:57:18 +0200[diff] [blame]53 tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG )
54 tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG )
55 tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I )
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]56
57 /* PCI */
Stefan Roese94b62702010-04-14 13:57:18 +0200[diff] [blame]58 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG )
59 tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG )
60 tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG )
61 tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG )
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]62
63 /* USB 2.0 Device */
Stefan Roese94b62702010-04-14 13:57:18 +0200[diff] [blame]64 tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG )
Stefan Roese326c9712005-08-01 16:41:48 +0200[diff] [blame]65
66 tlbtab_end