Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2006 Atmel Corporation |
| 3 | * |
| 4 | * Configuration settings for the AVR32 Network Gateway |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 7 | */ |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
Andreas Bießmann | 94156fa | 2010-11-04 23:15:30 +0000 | [diff] [blame] | 11 | #include <asm/arch/hardware.h> |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 12 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 13 | #define CONFIG_AT32AP |
| 14 | #define CONFIG_AT32AP7000 |
| 15 | #define CONFIG_MIMC200 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 16 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 17 | #define CONFIG_MIMC200_EXT_FLASH |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 18 | |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 19 | /* |
| 20 | * Set up the PLL to run at 140 MHz, the CPU to run at the PLL |
| 21 | * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency |
| 22 | * and the PBA bus to run at 1/4 the PLL frequency. |
| 23 | */ |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 24 | #define CONFIG_PLL |
| 25 | #define CONFIG_SYS_POWER_MANAGER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 26 | #define CONFIG_SYS_OSC0_HZ 10000000 |
| 27 | #define CONFIG_SYS_PLL0_DIV 1 |
| 28 | #define CONFIG_SYS_PLL0_MUL 15 |
| 29 | #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 |
| 30 | #define CONFIG_SYS_CLKDIV_CPU 0 |
| 31 | #define CONFIG_SYS_CLKDIV_HSB 1 |
| 32 | #define CONFIG_SYS_CLKDIV_PBA 2 |
| 33 | #define CONFIG_SYS_CLKDIV_PBB 1 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 34 | |
Haavard Skinnemoen | c6f292f | 2010-08-12 13:52:54 +0700 | [diff] [blame] | 35 | /* Reserve VM regions for SDRAM, NOR flash and FRAM */ |
| 36 | #define CONFIG_SYS_NR_VM_REGIONS 3 |
| 37 | |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 38 | /* |
| 39 | * The PLLOPT register controls the PLL like this: |
| 40 | * icp = PLLOPT<2> |
| 41 | * ivco = PLLOPT<1:0> |
| 42 | * |
| 43 | * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). |
| 44 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_PLL0_OPT 0x04 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 46 | |
Andreas Bießmann | 5807e79 | 2010-11-04 23:15:31 +0000 | [diff] [blame] | 47 | #define CONFIG_USART_BASE ATMEL_BASE_USART1 |
| 48 | #define CONFIG_USART_ID 1 |
| 49 | |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 50 | #define CONFIG_MIMC200_DBGLINK 1 |
| 51 | |
| 52 | /* User serviceable stuff */ |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 53 | #define CONFIG_DOS_PARTITION |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 54 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 55 | #define CONFIG_CMDLINE_TAG |
| 56 | #define CONFIG_SETUP_MEMORY_TAGS |
| 57 | #define CONFIG_INITRD_TAG |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 58 | |
| 59 | #define CONFIG_STACKSIZE (2048) |
| 60 | |
| 61 | #define CONFIG_BAUDRATE 115200 |
| 62 | #define CONFIG_BOOTARGS \ |
Mark Jackson | 3a0b9ab | 2009-08-17 16:42:52 +0100 | [diff] [blame] | 63 | "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1" |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 64 | #define CONFIG_BOOTCOMMAND \ |
Mark Jackson | 6685bf1 | 2008-10-03 11:48:57 +0100 | [diff] [blame] | 65 | "fsload boot/uImage; bootm" |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 66 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 67 | #define CONFIG_SILENT_CONSOLE /* enable silent startup */ |
| 68 | #define CONFIG_DISABLE_CONSOLE /* disable console */ |
| 69 | #define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */ |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 70 | |
Mark Jackson | 468d94d | 2009-07-21 11:35:22 +0100 | [diff] [blame] | 71 | #define CONFIG_LCD 1 |
| 72 | |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 73 | /* |
| 74 | * Only interrupt autoboot if <space> is pressed. Otherwise, garbage |
| 75 | * data on the serial line may interrupt the boot sequence. |
| 76 | */ |
| 77 | #define CONFIG_BOOTDELAY 0 |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 78 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
| 79 | #define CONFIG_AUTOBOOT |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 80 | |
| 81 | /* |
| 82 | * After booting the board for the first time, new ethernet addresses |
| 83 | * should be generated and assigned to the environment variables |
| 84 | * "ethaddr" and "eth1addr". This is normally done during production. |
| 85 | */ |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 86 | #define CONFIG_OVERWRITE_ETHADDR_ONCE |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 87 | |
| 88 | /* |
| 89 | * BOOTP/DHCP options |
| 90 | */ |
| 91 | #define CONFIG_BOOTP_SUBNETMASK |
| 92 | #define CONFIG_BOOTP_GATEWAY |
| 93 | |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 94 | /* |
| 95 | * Command line configuration. |
| 96 | */ |
| 97 | #include <config_cmd_default.h> |
| 98 | |
| 99 | #define CONFIG_CMD_ASKENV |
| 100 | #define CONFIG_CMD_DHCP |
| 101 | #define CONFIG_CMD_EXT2 |
| 102 | #define CONFIG_CMD_FAT |
| 103 | #define CONFIG_CMD_JFFS2 |
| 104 | #define CONFIG_CMD_MMC |
| 105 | #define CONFIG_CMD_NET |
| 106 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 107 | #define CONFIG_ATMEL_USART |
| 108 | #define CONFIG_MACB |
| 109 | #define CONFIG_PORTMUX_PIO |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 110 | #define CONFIG_SYS_NR_PIOS 5 |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 111 | #define CONFIG_SYS_HSDRAMC |
| 112 | #define CONFIG_MMC |
Sven Schnelle | 8aa9682 | 2011-10-21 14:49:25 +0200 | [diff] [blame] | 113 | #define CONFIG_GENERIC_ATMEL_MCI |
| 114 | #define CONFIG_GENERIC_MMC |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 115 | |
Mark Jackson | 468d94d | 2009-07-21 11:35:22 +0100 | [diff] [blame] | 116 | #if defined(CONFIG_LCD) |
| 117 | #define CONFIG_CMD_BMP |
| 118 | #define CONFIG_ATMEL_LCD 1 |
| 119 | #define LCD_BPP LCD_COLOR16 |
| 120 | #define CONFIG_BMP_16BPP 1 |
| 121 | #define CONFIG_FB_ADDR 0x10600000 |
| 122 | #define CONFIG_WHITE_ON_BLACK 1 |
| 123 | #define CONFIG_VIDEO_BMP_GZIP 1 |
| 124 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 |
| 125 | #define CONFIG_ATMEL_LCD_BGR555 1 |
| 126 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 127 | #define CONFIG_SPLASH_SCREEN 1 |
| 128 | #endif |
| 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_DCACHE_LINESZ 32 |
| 131 | #define CONFIG_SYS_ICACHE_LINESZ 32 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 132 | |
| 133 | #define CONFIG_NR_DRAM_BANKS 1 |
| 134 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 135 | #define CONFIG_SYS_FLASH_CFI |
| 136 | #define CONFIG_FLASH_CFI_DRIVER |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 137 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_FLASH_BASE 0x00000000 |
| 139 | #define CONFIG_SYS_FLASH_SIZE 0x800000 |
| 140 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 141 | #define CONFIG_SYS_MAX_FLASH_SECT 135 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 142 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Andreas Bießmann | 2015135 | 2011-04-18 04:12:46 +0000 | [diff] [blame] | 144 | #define CONFIG_SYS_TEXT_BASE 0x00000000 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 145 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE |
| 147 | #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE |
| 148 | #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 149 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 150 | #define CONFIG_SYS_FRAM_BASE 0x08000000 |
| 151 | #define CONFIG_SYS_FRAM_SIZE 0x20000 |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 152 | |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 153 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 154 | #define CONFIG_ENV_SIZE 65536 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 156 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 157 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 158 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_MALLOC_LEN (1024*1024) |
| 160 | #define CONFIG_SYS_DMA_ALLOC_LEN (16384) |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 161 | |
| 162 | /* Allow 4MB for the kernel run-time image */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 163 | #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) |
| 164 | #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 165 | |
| 166 | /* Other configuration settings that shouldn't have to change all that often */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 167 | #define CONFIG_SYS_PROMPT "U-Boot> " |
| 168 | #define CONFIG_SYS_CBSIZE 256 |
| 169 | #define CONFIG_SYS_MAXARGS 16 |
| 170 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
Andreas Bießmann | 87c62e4 | 2011-04-18 04:12:42 +0000 | [diff] [blame] | 171 | #define CONFIG_SYS_LONGHELP |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 172 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE |
| 174 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 175 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 176 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } |
Mark Jackson | 1744f5b | 2008-07-30 13:07:27 +0100 | [diff] [blame] | 177 | |
| 178 | #endif /* __CONFIG_H */ |