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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +05302/*
3 * Copyright 2016 Freescale Semiconductor, Inc.
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +05304 */
5
6#ifndef __LS1012ARDB_H__
7#define __LS1012ARDB_H__
8
9#include "ls1012a_common.h"
10
Shengzhou Liucb7fb122016-08-26 18:30:39 +080011/* DDR */
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053012#define CONFIG_DIMM_SLOTS_PER_CTLR 1
13#define CONFIG_CHIP_SELECTS_PER_CTRL 1
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053014#define CONFIG_SYS_SDRAM_SIZE 0x40000000
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053015#define CONFIG_CMD_MEMINFO
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053016#define CONFIG_SYS_MEMTEST_START 0x80000000
17#define CONFIG_SYS_MEMTEST_END 0x9fffffff
18
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053019
Kuldeep Singhdae56ea2019-09-18 14:58:11 +053020/* ENV */
21#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053022/*
23 * I2C IO expander
24 */
25
Yangbo Lu2786f902017-12-08 15:35:35 +080026#define I2C_MUX_IO_ADDR 0x24
Calvin Johnson6e6679b2018-03-08 15:30:30 +053027#define I2C_MUX_IO2_ADDR 0x25
Yangbo Lu2786f902017-12-08 15:35:35 +080028#define I2C_MUX_IO_0 0
29#define I2C_MUX_IO_1 1
30#define SW_BOOT_MASK 0x03
31#define SW_BOOT_EMU 0x02
32#define SW_BOOT_BANK1 0x00
33#define SW_BOOT_BANK2 0x01
34#define SW_REV_MASK 0xF8
35#define SW_REV_A 0xF8
36#define SW_REV_B 0xF0
Yangbo Lu13acb0d2017-12-08 15:35:36 +080037#define SW_REV_C 0xE8
38#define SW_REV_C1 0xE0
39#define SW_REV_C2 0xD8
40#define SW_REV_D 0xD0
41#define SW_REV_E 0xC8
Calvin Johnson6e6679b2018-03-08 15:30:30 +053042#define __PHY_MASK 0xF9
43#define __PHY_ETH2_MASK 0xFB
44#define __PHY_ETH1_MASK 0xFD
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053045
46/* MMC */
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053047#ifdef CONFIG_MMC
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053048#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053049#endif
50
Prabhakar Kushwahadf21f302016-12-26 12:15:08 +053051
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053052#define CONFIG_PCIE1 /* PCIE controller 1 */
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053053
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053054#define CONFIG_PCI_SCAN_SHOW
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053055
56#define CONFIG_CMD_MEMINFO
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +053057#define CONFIG_SYS_MEMTEST_START 0x80000000
58#define CONFIG_SYS_MEMTEST_END 0x9fffffff
59
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053060#undef CONFIG_EXTRA_ENV_SETTINGS
61#define CONFIG_EXTRA_ENV_SETTINGS \
62 "verify=no\0" \
63 "fdt_high=0xffffffffffffffff\0" \
64 "initrd_high=0xffffffffffffffff\0" \
65 "fdt_addr=0x00f00000\0" \
66 "kernel_addr=0x01000000\0" \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +053067 "kernelheader_addr=0x800000\0" \
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053068 "scriptaddr=0x80000000\0" \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +053069 "scripthdraddr=0x80080000\0" \
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053070 "fdtheader_addr_r=0x80100000\0" \
71 "kernelheader_addr_r=0x80200000\0" \
72 "kernel_addr_r=0x81000000\0" \
73 "fdt_addr_r=0x90000000\0" \
74 "load_addr=0xa0000000\0" \
75 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +053076 "kernelheader_size=0x40000\0" \
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053077 "console=ttyS0,115200\0" \
78 BOOTENV \
79 "boot_scripts=ls1012ardb_boot.scr\0" \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +053080 "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053081 "scan_dev_for_boot_part=" \
82 "part list ${devtype} ${devnum} devplist; " \
83 "env exists devplist || setenv devplist 1; " \
84 "for distro_bootpart in ${devplist}; do " \
85 "if fstype ${devtype} " \
86 "${devnum}:${distro_bootpart} " \
87 "bootfstype; then " \
88 "run scan_dev_for_boot; " \
89 "fi; " \
90 "done\0" \
91 "scan_dev_for_boot=" \
92 "echo Scanning ${devtype} " \
93 "${devnum}:${distro_bootpart}...; " \
94 "for prefix in ${boot_prefixes}; do " \
95 "run scan_dev_for_scripts; " \
96 "done;" \
97 "\0" \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +053098 "boot_a_script=" \
99 "load ${devtype} ${devnum}:${distro_bootpart} " \
100 "${scriptaddr} ${prefix}${script}; " \
101 "env exists secureboot && load ${devtype} " \
102 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai25355ec2019-04-23 05:52:17 +0000103 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
104 "env exists secureboot " \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +0530105 "&& esbc_validate ${scripthdraddr};" \
106 "source ${scriptaddr}\0" \
Rajesh Bhagatd59447a2017-11-30 16:44:38 +0530107 "installer=load mmc 0:2 $load_addr " \
108 "/flex_installer_arm64.itb; " \
109 "bootm $load_addr#$board\0" \
110 "qspi_bootcmd=echo Trying load from qspi..;" \
111 "sf probe && sf read $load_addr " \
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +0530112 "$kernel_addr $kernel_size; env exists secureboot " \
113 "&& sf read $kernelheader_addr_r $kernelheader_addr " \
114 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
115 "bootm $load_addr#$board\0"
Rajesh Bhagatd59447a2017-11-30 16:44:38 +0530116
117#undef CONFIG_BOOTCOMMAND
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000118#ifdef CONFIG_TFABOOT
119#undef QSPI_NOR_BOOTCOMMAND
120#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
121 "env exists secureboot && esbc_halt;"
122#else
Calvin Johnson0e6101a2018-03-08 15:30:35 +0530123#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
Vinitha Pillai-B572234b56f5b2018-01-09 23:03:42 +0530124 "env exists secureboot && esbc_halt;"
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000125#endif
Vinitha Pillai-B57223eea4a322017-03-23 13:48:20 +0530126
127#include <asm/fsl_secure_boot.h>
128
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530129#endif /* __LS1012ARDB_H__ */