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git01.mediatek.com / filogic / uboot / 117f37e727f7d8c58afc7c12d5706e8d15145c20 / . / arch / arm / dts / imx8mm-venice-gw72xx-0x-u-boot.dtsi
blob: 31f9d47bced827c1c674f09b24214ed536eab953 [file] [log] [blame]
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2021 Gateworks Corporation
4 */
5#include "imx8mm-venice-gw700x-u-boot.dtsi"
Tim Harveya5953f92022-04-13 09:02:44 -0700[diff] [blame]6
7&gpio1 {
8 rs485_term {
9 gpio-hog;
10 output-low;
11 gpios = <0 GPIO_ACTIVE_HIGH>;
12 line-name = "rs485_term";
13 };
14
15 mipi_gpio4 {
16 gpio-hog;
17 input;
18 gpios = <1 GPIO_ACTIVE_HIGH>;
19 line-name = "mipi_gpio4";
20 };
21
22 pci_usb_sel {
23 gpio-hog;
24 output-low;
25 gpios = <6 GPIO_ACTIVE_HIGH>;
26 line-name = "pci_usb_sel";
27 };
28
29 dio_0 {
30 gpio-hog;
31 input;
32 gpios = <7 GPIO_ACTIVE_HIGH>;
33 line-name = "dio0";
34 };
35
36 dio_1 {
37 gpio-hog;
38 input;
39 gpios = <9 GPIO_ACTIVE_HIGH>;
40 line-name = "dio1";
41 };
Tim Harvey0f7f6192023-11-27 11:36:58 -0800[diff] [blame]42
43 tpm_rst {
44 gpio-hog;
45 output-high;
46 gpios = <11 GPIO_ACTIVE_HIGH>;
47 line-name = "tpm_rst#";
48 };
Tim Harveya5953f92022-04-13 09:02:44 -0700[diff] [blame]49};
50
51&gpio4 {
52 rs485_en {
53 gpio-hog;
54 output-low;
55 gpios = <0 GPIO_ACTIVE_HIGH>;
56 line-name = "rs485_en";
57 };
58
59 mipi_gpio3 {
60 gpio-hog;
61 input;
62 gpios = <1 GPIO_ACTIVE_HIGH>;
63 line-name = "mipi_gpio3";
64 };
65
66 rs485_half {
67 gpio-hog;
68 output-low;
69 gpios = <2 GPIO_ACTIVE_HIGH>;
70 line-name = "rs485_hd";
71 };
72
73 mipi_gpio2 {
74 gpio-hog;
75 input;
76 gpios = <3 GPIO_ACTIVE_HIGH>;
77 line-name = "mipi_gpio2";
78 };
79
80 mipi_gpio1 {
81 gpio-hog;
82 input;
83 gpios = <4 GPIO_ACTIVE_HIGH>;
84 line-name = "mipi_gpio1";
85 };
86
87 pci_wdis {
88 gpio-hog;
89 output-high;
90 gpios = <7 GPIO_ACTIVE_HIGH>;
91 line-name = "pci_wdis#";
92 };
93};