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git01.mediatek.com / filogic / uboot / 113094e61942a29c60df1aac7ab12df97ce84a63 / . / configs / socfpga_sockit_defconfig
blob: 59fbb2c3c1292e461ab273e7b3e87e7b207ce482 [file] [log] [blame]
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]3CONFIG_SYS_MALLOC_F_LEN=0x2000
4CONFIG_SPL_DM=y
5CONFIG_DM_GPIO=y
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]6CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]7CONFIG_SPL_STACK_R_ADDR=0x00800000
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
9CONFIG_SPL=y
Nathan Rossi737540f2016-01-08 03:00:48 +1000[diff] [blame]10CONFIG_SPL_DM_SEQ_ALIAS=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]11CONFIG_SPL_STACK_R=y
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]12# CONFIG_CMD_IMLS is not set
13# CONFIG_CMD_FLASH is not set
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]14CONFIG_CMD_GPIO=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]15CONFIG_SPL_SIMPLE_BUS=y
16CONFIG_DWAPB_GPIO=y
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]17CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]18CONFIG_SPI_FLASH_SPANSION=y
19CONFIG_SPI_FLASH_STMICRO=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]20# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]21CONFIG_DM_ETH=y
Marek Vasutb415bad2015-06-21 17:28:53 +0200[diff] [blame]22CONFIG_ETH_DESIGNWARE=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]23CONFIG_SYS_NS16550=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]24CONFIG_CADENCE_QSPI=y
25CONFIG_DESIGNWARE_SPI=y
Marek Vasut3b3c0dc2015-11-30 20:40:07 +0100[diff] [blame]26CONFIG_DM_MMC=y
Marek Vasut90576c92015-12-05 19:24:22 +0100[diff] [blame]27CONFIG_USB=y
28CONFIG_DM_USB=y