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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/nvidia,tegra194-tcu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra Combined UART (TCU)
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
12
13description:
14 The TCU is a system for sharing a hardware UART instance among multiple
15 systems within the Tegra SoC. It is implemented through a mailbox-
16 based protocol where each "virtual UART" has a pair of mailboxes, one
17 for transmitting and one for receiving, that is used to communicate
18 with the hardware implementing the TCU.
19
20properties:
21 $nodename:
22 pattern: "^serial(@.*)?$"
23
24 compatible:
25 oneOf:
26 - const: nvidia,tegra194-tcu
27 - items:
28 - enum:
29 - nvidia,tegra234-tcu
30 - const: nvidia,tegra194-tcu
31
32 mbox-names:
33 items:
34 - const: rx
35 - const: tx
36
37 mboxes:
38 description: |
39 List of phandles to mailbox channels used for receiving and
40 transmitting data from and to the hardware UART.
41 items:
42 - description: mailbox for receiving data from hardware UART
43 - description: mailbox for transmitting data to hardware UART
44
45required:
46 - compatible
47 - mbox-names
48 - mboxes
49
50additionalProperties: false
51
52examples:
53 - |
54 #include <dt-bindings/mailbox/tegra186-hsp.h>
55
56 tcu: serial {
57 compatible = "nvidia,tegra194-tcu";
58 mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM 0>,
59 <&hsp_aon TEGRA_HSP_MBOX_TYPE_SM 1>;
60 mbox-names = "rx", "tx";
61 };