dts/upstream/Bindings/remoteproc/xlnx,zynqmp-r5fss.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Xilinx R5F processor subsystem

maintainers:
  - Ben Levinsky <ben.levinsky@amd.com>
  - Tanmay Shah <tanmay.shah@amd.com>

description: |
  The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
  real-time processing based on the Cortex-R5F processor core from ARM.
  The Cortex-R5F processor implements the Arm v7-R architecture and includes a
  floating-point unit that implements the Arm VFPv3 instruction set.

properties:
  compatible:
    enum:
      - xlnx,zynqmp-r5fss
      - xlnx,versal-r5fss
      - xlnx,versal-net-r52fss

  "#address-cells":
    const: 2

  "#size-cells":
    const: 2

  ranges:
    description: |
      Standard ranges definition providing address translations for
      local R5F TCM address spaces to bus addresses.

  xlnx,cluster-mode:
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1, 2]
    default: 1
    description: |
      The RPU MPCore can operate in split mode (Dual-processor performance), Safety
      lock-step mode(Both RPU cores execute the same code in lock-step,
      clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
      core 1 runs normally). The processor does not support dynamic configuration.
      Switching between modes is only permitted immediately after a processor reset.
      If set to  1 then lockstep mode and if 0 then split mode.
      If set to  2 then single CPU mode. When not defined, default will be lockstep mode.
      In summary,
      0: split mode
      1: lockstep mode (default)
      2: single cpu mode

  xlnx,tcm-mode:
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1]
    description: |
      Configure RPU TCM
      0: split mode
      1: lockstep mode

patternProperties:
  "^r(.*)@[0-9a-f]+$":
    type: object
    description: |
      The RPU is located in the Low Power Domain of the Processor Subsystem.
      Each processor includes separate L1 instruction and data caches and
      tightly coupled memories (TCM). System memory is cacheable, but the TCM
      memory space is non-cacheable.

      Each RPU contains one 64KB memory and two 32KB memories that
      are accessed via the TCM A and B port interfaces, for a total of 128KB
      per processor. In lock-step mode, the processor has access to 256KB of
      TCM memory.

    properties:
      compatible:
        enum:
          - xlnx,zynqmp-r5f
          - xlnx,versal-r5f
          - xlnx,versal-net-r52f

      reg:
        minItems: 1
        maxItems: 4

      reg-names:
        minItems: 1
        maxItems: 4

      power-domains:
        minItems: 2
        maxItems: 5

      mboxes:
        minItems: 1
        items:
          - description: mailbox channel to send data to RPU
          - description: mailbox channel to receive data from RPU

      mbox-names:
        minItems: 1
        items:
          - const: tx
          - const: rx

      sram:
        $ref: /schemas/types.yaml#/definitions/phandle-array
        minItems: 1
        maxItems: 8
        items:
          maxItems: 1
        description: |
          phandles to one or more reserved on-chip SRAM regions. Other than TCM,
          the RPU can execute instructions and access data from the OCM memory,
          the main DDR memory, and other system memories.

          The regions should be defined as child nodes of the respective SRAM
          node, and should be defined as per the generic bindings in
          Documentation/devicetree/bindings/sram/sram.yaml

      memory-region:
        description: |
          List of phandles to the reserved memory regions associated with the
          remoteproc device. This is variable and describes the memories shared with
          the remote processor (e.g. remoteproc firmware and carveouts, rpmsg
          vrings, ...). This reserved memory region will be allocated in DDR memory.
        minItems: 1
        maxItems: 8
        items:
          - description: region used for RPU firmware image section
          - description: vdev buffer
          - description: vring0
          - description: vring1
        additionalItems: true

    required:
      - compatible
      - reg
      - reg-names
      - power-domains

required:
  - compatible
  - "#address-cells"
  - "#size-cells"
  - ranges

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - xlnx,versal-net-r52fss
    then:
      properties:
        xlnx,tcm-mode: false

      patternProperties:
        "^r52f@[0-9a-f]+$":
          type: object

          properties:
            reg:
              minItems: 1
              items:
                - description: ATCM internal memory
                - description: BTCM internal memory
                - description: CTCM internal memory

            reg-names:
              minItems: 1
              items:
                - const: atcm0
                - const: btcm0
                - const: ctcm0

            power-domains:
              minItems: 2
              items:
                - description: RPU core power domain
                - description: ATCM power domain
                - description: BTCM power domain
                - description: CTCM power domain

  - if:
      properties:
        compatible:
          contains:
            enum:
              - xlnx,zynqmp-r5fss
              - xlnx,versal-r5fss
    then:
      if:
        properties:
          xlnx,cluster-mode:
            enum: [1, 2]
      then:
        properties:
          xlnx,tcm-mode:
            enum: [1]

        patternProperties:
          "^r5f@[0-9a-f]+$":
            type: object

            properties:
              reg:
                minItems: 1
                items:
                  - description: ATCM internal memory
                  - description: BTCM internal memory
                  - description: extra ATCM memory in lockstep mode
                  - description: extra BTCM memory in lockstep mode

              reg-names:
                minItems: 1
                items:
                  - const: atcm0
                  - const: btcm0
                  - const: atcm1
                  - const: btcm1

              power-domains:
                minItems: 2
                items:
                  - description: RPU core power domain
                  - description: ATCM power domain
                  - description: BTCM power domain
                  - description: second ATCM power domain
                  - description: second BTCM power domain

        required:
          - xlnx,tcm-mode

      else:
        properties:
          xlnx,tcm-mode:
            enum: [0]

        patternProperties:
          "^r5f@[0-9a-f]+$":
            type: object

            properties:
              reg:
                minItems: 1
                items:
                  - description: ATCM internal memory
                  - description: BTCM internal memory

              reg-names:
                minItems: 1
                items:
                  - const: atcm0
                  - const: btcm0

              power-domains:
                minItems: 2
                items:
                  - description: RPU core power domain
                  - description: ATCM power domain
                  - description: BTCM power domain

        required:
          - xlnx,tcm-mode

additionalProperties: false

examples:
  - |
    #include <dt-bindings/power/xlnx-zynqmp-power.h>

    // Split mode configuration
    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        remoteproc@ffe00000 {
            compatible = "xlnx,zynqmp-r5fss";
            xlnx,cluster-mode = <0>;
            xlnx,tcm-mode = <0>;

            #address-cells = <2>;
            #size-cells = <2>;
            ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
                     <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
                     <0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
                     <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;

            r5f@0 {
                compatible = "xlnx,zynqmp-r5f";
                reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
                reg-names = "atcm0", "btcm0";
                power-domains = <&zynqmp_firmware PD_RPU_0>,
                                <&zynqmp_firmware PD_R5_0_ATCM>,
                                <&zynqmp_firmware PD_R5_0_BTCM>;
                memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
                                <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
                mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
                mbox-names = "tx", "rx";
            };

            r5f@1 {
                compatible = "xlnx,zynqmp-r5f";
                reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
                reg-names = "atcm0", "btcm0";
                power-domains = <&zynqmp_firmware PD_RPU_1>,
                                <&zynqmp_firmware PD_R5_1_ATCM>,
                                <&zynqmp_firmware PD_R5_1_BTCM>;
                memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
                                <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
                mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
                mbox-names = "tx", "rx";
            };
        };
    };

  - |
    //Lockstep configuration
    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        remoteproc@ffe00000 {
            compatible = "xlnx,zynqmp-r5fss";
            xlnx,cluster-mode = <1>;
            xlnx,tcm-mode = <1>;

            #address-cells = <2>;
            #size-cells = <2>;
            ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
                     <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
                     <0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
                     <0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;

            r5f@0 {
                compatible = "xlnx,zynqmp-r5f";
                reg = <0x0 0x0 0x0 0x10000>,
                      <0x0 0x20000 0x0 0x10000>,
                      <0x0 0x10000 0x0 0x10000>,
                      <0x0 0x30000 0x0 0x10000>;
                reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
                power-domains = <&zynqmp_firmware PD_RPU_0>,
                                <&zynqmp_firmware PD_R5_0_ATCM>,
                                <&zynqmp_firmware PD_R5_0_BTCM>,
                                <&zynqmp_firmware PD_R5_1_ATCM>,
                                <&zynqmp_firmware PD_R5_1_BTCM>;
                memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
                                <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
                mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
                mbox-names = "tx", "rx";
            };

            r5f@1 {
                compatible = "xlnx,zynqmp-r5f";
                reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
                reg-names = "atcm0", "btcm0";
                power-domains = <&zynqmp_firmware PD_RPU_1>,
                                <&zynqmp_firmware PD_R5_1_ATCM>,
                                <&zynqmp_firmware PD_R5_1_BTCM>;
                memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
                                <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
                mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
                mbox-names = "tx", "rx";
            };
        };
    };
...