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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Reduced Pin Count Interface (RPC-IF)
8
9maintainers:
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12description: |
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14 be accessed via the external address space read mode or the manual mode.
15
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
17 The flash interface is selected based on the "compatible" property of this
18 subnode:
19 - if it contains "jedec,spi-nor", then SPI is used;
20 - if it contains "cfi-flash", then HyperFlash is used.
21
22allOf:
23 - $ref: /schemas/spi/spi-controller.yaml#
24
25properties:
26 compatible:
27 oneOf:
28 - items:
29 - enum:
30 - renesas,r8a774a1-rpc-if # RZ/G2M
31 - renesas,r8a774b1-rpc-if # RZ/G2N
32 - renesas,r8a774c0-rpc-if # RZ/G2E
33 - renesas,r8a774e1-rpc-if # RZ/G2H
34 - renesas,r8a7795-rpc-if # R-Car H3
35 - renesas,r8a7796-rpc-if # R-Car M3-W
36 - renesas,r8a77961-rpc-if # R-Car M3-W+
37 - renesas,r8a77965-rpc-if # R-Car M3-N
38 - renesas,r8a77970-rpc-if # R-Car V3M
39 - renesas,r8a77980-rpc-if # R-Car V3H
40 - renesas,r8a77990-rpc-if # R-Car E3
41 - renesas,r8a77995-rpc-if # R-Car D3
42 - renesas,r8a779a0-rpc-if # R-Car V3U
43 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device
44
45 - items:
46 - enum:
47 - renesas,r8a779g0-rpc-if # R-Car V4H
Tom Rini6bb92fc2024-05-20 09:54:58 -060048 - renesas,r8a779h0-rpc-if # R-Car V4M
Tom Rini53633a82024-02-29 12:33:36 -050049 - const: renesas,rcar-gen4-rpc-if # a generic R-Car gen4 device
50
51 - items:
52 - enum:
53 - renesas,r9a07g043-rpc-if # RZ/G2UL
54 - renesas,r9a07g044-rpc-if # RZ/G2{L,LC}
55 - renesas,r9a07g054-rpc-if # RZ/V2L
56 - const: renesas,rzg2l-rpc-if
57
58 reg:
59 items:
60 - description: RPC-IF registers
61 - description: direct mapping read mode area
62 - description: write buffer area
63
64 reg-names:
65 items:
66 - const: regs
67 - const: dirmap
68 - const: wbuf
69
70 clocks: true
71
72 interrupts:
73 maxItems: 1
74
75 power-domains:
76 maxItems: 1
77
78 resets:
79 maxItems: 1
80
81patternProperties:
82 "flash@[0-9a-f]+$":
83 type: object
84 additionalProperties: true
85
86 properties:
87 compatible:
88 contains:
89 enum:
90 - cfi-flash
91 - jedec,spi-nor
92
93required:
94 - compatible
95 - reg
96 - reg-names
97 - clocks
98 - power-domains
99 - resets
100 - '#address-cells'
101 - '#size-cells'
102
103if:
104 properties:
105 compatible:
106 contains:
107 enum:
108 - renesas,rzg2l-rpc-if
109then:
110 properties:
111 clocks:
112 items:
113 - description: SPI Multi IO Register access clock (SPI_CLK2)
114 - description: SPI Multi IO Main clock (SPI_CLK).
115
116else:
117 properties:
118 clocks:
119 maxItems: 1
120
121unevaluatedProperties: false
122
123examples:
124 - |
125 #include <dt-bindings/clock/renesas-cpg-mssr.h>
126 #include <dt-bindings/power/r8a77995-sysc.h>
127
128 spi@ee200000 {
129 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
130 reg = <0xee200000 0x200>,
131 <0x08000000 0x4000000>,
132 <0xee208000 0x100>;
133 reg-names = "regs", "dirmap", "wbuf";
134 clocks = <&cpg CPG_MOD 917>;
135 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
136 resets = <&cpg 917>;
137 #address-cells = <1>;
138 #size-cells = <0>;
139
140 flash@0 {
141 compatible = "jedec,spi-nor";
142 reg = <0>;
143 spi-max-frequency = <40000000>;
144 spi-tx-bus-width = <1>;
145 spi-rx-bus-width = <1>;
146 };
147 };