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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Chander Kashyap0d2f2772013-08-21 10:38:56 +05302/*
3 * Copyright (C) 2013 Samsung Electronics
Chander Kashyap0d2f2772013-08-21 10:38:56 +05304 */
5
6#include <common.h>
Inderpal Singh3260bc82014-01-08 09:19:57 +05307#include <usb.h>
Simon Glass37f11622014-10-20 19:48:37 -06008#include <asm/gpio.h>
Chander Kashyap0d2f2772013-08-21 10:38:56 +05309#include <asm/arch/pinmux.h>
Inderpal Singh04bb7372013-08-21 10:38:57 +053010#include <asm/arch/dwmmc.h>
Chander Kashyap0d2f2772013-08-21 10:38:56 +053011#include <asm/arch/power.h>
12
13DECLARE_GLOBAL_DATA_PTR;
14
Inderpal Singh3260bc82014-01-08 09:19:57 +053015#ifdef CONFIG_USB_EHCI_EXYNOS
16int board_usb_init(int index, enum usb_init_type init)
17{
Inderpal Singh3260bc82014-01-08 09:19:57 +053018 /* Configure gpios for usb 3503 hub:
19 * disconnect, toggle reset and connect
20 */
Simon Glass4f83d3d2014-10-20 19:48:39 -060021 gpio_request(EXYNOS5_GPIO_D17, "usb_connect");
22 gpio_request(EXYNOS5_GPIO_X35, "usb_reset");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053023 gpio_direction_output(EXYNOS5_GPIO_D17, 0);
24 gpio_direction_output(EXYNOS5_GPIO_X35, 0);
Inderpal Singh3260bc82014-01-08 09:19:57 +053025
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053026 gpio_direction_output(EXYNOS5_GPIO_X35, 1);
27 gpio_direction_output(EXYNOS5_GPIO_D17, 1);
Inderpal Singh3260bc82014-01-08 09:19:57 +053028
29 return 0;
30}
31#endif
32
Chander Kashyap0d2f2772013-08-21 10:38:56 +053033int board_init(void)
34{
35 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
36 return 0;
37}
38
39int dram_init(void)
40{
41 int i;
42 u32 addr;
43
44 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
45 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
46 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
47 }
48 return 0;
49}
50
51int power_init_board(void)
52{
53 set_ps_hold_ctrl();
54 return 0;
55}
56
Simon Glass2f949c32017-03-31 08:40:32 -060057int dram_init_banksize(void)
Chander Kashyap0d2f2772013-08-21 10:38:56 +053058{
59 int i;
60 u32 addr, size;
61
62 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
63 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
64 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
65
66 gd->bd->bi_dram[i].start = addr;
67 gd->bd->bi_dram[i].size = size;
68 }
Simon Glass2f949c32017-03-31 08:40:32 -060069
70 return 0;
Chander Kashyap0d2f2772013-08-21 10:38:56 +053071}
72
Masahiro Yamada0a780172017-05-09 20:31:39 +090073#ifdef CONFIG_MMC
Inderpal Singh04bb7372013-08-21 10:38:57 +053074int board_mmc_init(bd_t *bis)
75{
76 int ret;
77 /* dwmmc initializattion for available channels */
78 ret = exynos_dwmmc_init(gd->fdt_blob);
79 if (ret)
80 debug("dwmmc init failed\n");
81
82 return ret;
83}
84#endif
85
Chander Kashyap0d2f2772013-08-21 10:38:56 +053086static int board_uart_init(void)
87{
88 int err = 0, uart_id;
89
90 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
91 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
92 if (err) {
93 debug("UART%d not configured\n",
94 (uart_id - PERIPH_ID_UART0));
95 return err;
96 }
97 }
98 return err;
99}
100
101#ifdef CONFIG_BOARD_EARLY_INIT_F
102int board_early_init_f(void)
103{
104 int err;
105
106 err = board_uart_init();
107 if (err) {
108 debug("UART init failed\n");
109 return err;
110 }
111 return err;
112}
113#endif
114
115#ifdef CONFIG_DISPLAY_BOARDINFO
116int checkboard(void)
117{
118 printf("\nBoard: Arndale\n");
119
120 return 0;
121}
122#endif
Andre Przywara64d4c222014-08-01 13:35:44 +0200123
124#ifdef CONFIG_S5P_PA_SYSRAM
125void smp_set_core_boot_addr(unsigned long addr, int corenr)
126{
127 writel(addr, CONFIG_S5P_PA_SYSRAM);
128
129 /* make sure this write is really executed */
130 __asm__ volatile ("dsb\n");
131}
132#endif