Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 10e4779db8ae6c2784392fa7a1f690645918662d / . / board / freescale / common / pixis.h
blob: 40053c45bb755d2ed40de2d197d33864b9167475 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame^]1/* SPDX-License-Identifier: GPL-2.0+ */
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]2/*
3 * Copyright 2010 Freescale Semiconductor, Inc.
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]4 */
5#ifndef __PIXIS_H_
6#define __PIXIS_H_ 1
7
8/* PIXIS register set. */
York Sunc731cc22016-11-16 11:09:07 -0800[diff] [blame]9#if defined(CONFIG_TARGET_MPC8536DS)
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]10typedef struct pixis {
11 u8 id;
12 u8 ver;
13 u8 pver;
14 u8 csr;
15 u8 rst;
16 u8 rst2;
17 u8 aux1;
18 u8 spd;
19 u8 aux2;
20 u8 csr2;
21 u8 watch;
22 u8 led;
23 u8 pwr;
24 u8 res[3];
25 u8 vctl;
26 u8 vstat;
27 u8 vcfgen0;
28 u8 vcfgen1;
29 u8 vcore0;
30 u8 res1;
31 u8 vboot;
32 u8 vspeed[3];
33 u8 sclk[3];
34 u8 dclk[3];
35 u8 i2cdacr;
36 u8 vcoreacc[4];
37 u8 vcorecnt[3];
38 u8 vcoremax[2];
39 u8 vplatacc[4];
40 u8 vplatcnt[3];
41 u8 vplatmax[2];
42 u8 vtempacc[4];
43 u8 vtempcnt[3];
44 u8 vtempmax[2];
45 u8 res2[4];
46} __attribute__ ((packed)) pixis_t;
47
York Sun5ddf0982016-11-16 11:45:18 -0800[diff] [blame]48#elif defined(CONFIG_TARGET_MPC8544DS)
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]49typedef struct pixis {
50 u8 id;
51 u8 ver;
52 u8 pver;
53 u8 csr;
54 u8 rst;
55 u8 pwr;
56 u8 aux1;
57 u8 spd;
58 u8 res[8];
59 u8 vctl;
60 u8 vstat;
61 u8 vcfgen0;
62 u8 vcfgen1;
63 u8 vcore0;
64 u8 res1;
65 u8 vboot;
66 u8 vspeed[2];
67 u8 vclkh;
68 u8 vclkl;
69 u8 watch;
70 u8 led;
71 u8 vspeed2;
72 u8 res2[34];
73} __attribute__ ((packed)) pixis_t;
74
York Sun09d1cbf2016-11-16 11:41:12 -0800[diff] [blame]75#elif defined(CONFIG_TARGET_MPC8572DS)
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]76typedef struct pixis {
77 u8 id;
78 u8 ver;
79 u8 pver;
80 u8 csr;
81 u8 rst;
82 u8 pwr1;
83 u8 aux1;
84 u8 spd;
85 u8 aux2;
86 u8 res[7];
87 u8 vctl;
88 u8 vstat;
89 u8 vcfgen0;
90 u8 vcfgen1;
91 u8 vcore0;
92 u8 res1;
93 u8 vboot;
94 u8 vspeed[3];
95 u8 res2[2];
96 u8 sclk[3];
97 u8 dclk[3];
98 u8 res3[2];
99 u8 watch;
100 u8 led;
101 u8 res4[25];
102} __attribute__ ((packed)) pixis_t;
103
York Sun94036382016-11-23 14:07:01 -0800[diff] [blame]104#elif defined(CONFIG_TARGET_MPC8610HPCD)
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]105typedef struct pixis {
106 u8 id;
107 u8 ver; /* also called arch */
108 u8 pver;
109 u8 csr;
110 u8 rst;
111 u8 pwr;
112 u8 aux;
113 u8 spd;
114 u8 brdcfg0;
115 u8 brdcfg1;
116 u8 res[4];
117 u8 led;
118 u8 serno;
119 u8 vctl;
120 u8 vstat;
121 u8 vcfgen0;
122 u8 vcfgen1;
123 u8 vcore0;
124 u8 res1;
125 u8 vboot;
126 u8 vspeed[2];
127 u8 res2;
128 u8 sclk[3];
129 u8 res3;
130 u8 watch;
131 u8 res4[33];
132} __attribute__ ((packed)) pixis_t;
133
York Sun0615e7c2016-11-23 14:10:14 -0800[diff] [blame]134#elif defined(CONFIG_TARGET_MPC8641HPCN)
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]135typedef struct pixis {
136 u8 id;
137 u8 ver;
138 u8 pver;
139 u8 csr;
140 u8 rst;
141 u8 pwr;
142 u8 aux;
143 u8 spd;
144 u8 res[8];
145 u8 vctl;
146 u8 vstat;
147 u8 vcfgen0;
148 u8 vcfgen1;
149 u8 vcore0;
150 u8 res1;
151 u8 vboot;
152 u8 vspeed[2];
153 u8 vclkh;
154 u8 vclkl;
155 u8 watch;
156 u8 res3[36];
157} __attribute__ ((packed)) pixis_t;
158#else
159#error Need to define pixis_t for this board
160#endif
161
162/* Pointer to the PIXIS register set */
163#define pixis ((pixis_t *)PIXIS_BASE)
164
165#endif /* __PIXIS_H_ */