Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Bin Meng | 1dd2f67 | 2016-05-25 19:19:10 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> |
Bin Meng | 1dd2f67 | 2016-05-25 19:19:10 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | Device (PCI0) |
| 7 | { |
| 8 | Name(_HID, EISAID("PNP0A08")) /* PCIe */ |
| 9 | Name(_CID, EISAID("PNP0A03")) /* PCI */ |
| 10 | |
| 11 | Name(_ADR, 0) |
| 12 | Name(_BBN, 0) |
| 13 | |
| 14 | Name(MCRS, ResourceTemplate() |
| 15 | { |
| 16 | /* Bus Numbers */ |
| 17 | WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 18 | 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00) |
| 19 | |
| 20 | /* IO Region 0 */ |
| 21 | WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 22 | 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00) |
| 23 | |
| 24 | /* PCI Config Space */ |
| 25 | IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) |
| 26 | |
| 27 | /* IO Region 1 */ |
| 28 | WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 29 | 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01) |
| 30 | |
| 31 | /* VGA memory (0xa0000-0xbffff) */ |
| 32 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 33 | Cacheable, ReadWrite, |
| 34 | 0x00000000, 0x000a0000, 0x000bffff, 0x00000000, |
| 35 | 0x00020000, , , ASEG) |
| 36 | |
| 37 | /* OPROM reserved (0xc0000-0xc3fff) */ |
| 38 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 39 | Cacheable, ReadWrite, |
| 40 | 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000, |
| 41 | 0x00004000, , , OPR0) |
| 42 | |
| 43 | /* OPROM reserved (0xc4000-0xc7fff) */ |
| 44 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 45 | Cacheable, ReadWrite, |
| 46 | 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000, |
| 47 | 0x00004000, , , OPR1) |
| 48 | |
| 49 | /* OPROM reserved (0xc8000-0xcbfff) */ |
| 50 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 51 | Cacheable, ReadWrite, |
| 52 | 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000, |
| 53 | 0x00004000, , , OPR2) |
| 54 | |
| 55 | /* OPROM reserved (0xcc000-0xcffff) */ |
| 56 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 57 | Cacheable, ReadWrite, |
| 58 | 0x00000000, 0x000cc000, 0x000cffff, 0x00000000, |
| 59 | 0x00004000, , , OPR3) |
| 60 | |
| 61 | /* OPROM reserved (0xd0000-0xd3fff) */ |
| 62 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 63 | Cacheable, ReadWrite, |
| 64 | 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000, |
| 65 | 0x00004000, , , OPR4) |
| 66 | |
| 67 | /* OPROM reserved (0xd4000-0xd7fff) */ |
| 68 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 69 | Cacheable, ReadWrite, |
| 70 | 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000, |
| 71 | 0x00004000, , , OPR5) |
| 72 | |
| 73 | /* OPROM reserved (0xd8000-0xdbfff) */ |
| 74 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 75 | Cacheable, ReadWrite, |
| 76 | 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000, |
| 77 | 0x00004000, , , OPR6) |
| 78 | |
| 79 | /* OPROM reserved (0xdc000-0xdffff) */ |
| 80 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 81 | Cacheable, ReadWrite, |
| 82 | 0x00000000, 0x000dc000, 0x000dffff, 0x00000000, |
| 83 | 0x00004000, , , OPR7) |
| 84 | |
| 85 | /* BIOS Extension (0xe0000-0xe3fff) */ |
| 86 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 87 | Cacheable, ReadWrite, |
| 88 | 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000, |
| 89 | 0x00004000, , , ESG0) |
| 90 | |
| 91 | /* BIOS Extension (0xe4000-0xe7fff) */ |
| 92 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 93 | Cacheable, ReadWrite, |
| 94 | 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000, |
| 95 | 0x00004000, , , ESG1) |
| 96 | |
| 97 | /* BIOS Extension (0xe8000-0xebfff) */ |
| 98 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 99 | Cacheable, ReadWrite, |
| 100 | 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000, |
| 101 | 0x00004000, , , ESG2) |
| 102 | |
| 103 | /* BIOS Extension (0xec000-0xeffff) */ |
| 104 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 105 | Cacheable, ReadWrite, |
| 106 | 0x00000000, 0x000ec000, 0x000effff, 0x00000000, |
| 107 | 0x00004000, , , ESG3) |
| 108 | |
| 109 | /* System BIOS (0xf0000-0xfffff) */ |
| 110 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 111 | Cacheable, ReadWrite, |
| 112 | 0x00000000, 0x000f0000, 0x000fffff, 0x00000000, |
| 113 | 0x00010000, , , FSEG) |
| 114 | |
| 115 | /* PCI Memory Region (TOLM-CONFIG_MMCONF_BASE_ADDRESS) */ |
| 116 | DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 117 | Cacheable, ReadWrite, |
| 118 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 119 | 0x00000000, , , PMEM) |
| 120 | }) |
| 121 | |
| 122 | Method(_CRS, 0, Serialized) |
| 123 | { |
| 124 | /* Update PCI resource area */ |
| 125 | CreateDwordField(MCRS, ^PMEM._MIN, PMIN) |
| 126 | CreateDwordField(MCRS, ^PMEM._MAX, PMAX) |
| 127 | CreateDwordField(MCRS, ^PMEM._LEN, PLEN) |
| 128 | |
| 129 | /* |
| 130 | * Hardcode TOLM to 2GB for now (see DRAM_MAX_SIZE in quark.h) |
| 131 | * |
| 132 | * TODO: for generic usage, read TOLM value from register, or |
| 133 | * from global NVS (not implemented by U-Boot yet). |
| 134 | */ |
| 135 | Store(0x80000000, PMIN) |
| 136 | Store(Subtract(MCFG_BASE_ADDRESS, 1), PMAX) |
| 137 | Add(Subtract(PMAX, PMIN), 1, PLEN) |
| 138 | |
| 139 | Return (MCRS) |
| 140 | } |
| 141 | |
| 142 | /* Device Resource Consumption */ |
| 143 | Device (PDRC) |
| 144 | { |
| 145 | Name(_HID, EISAID("PNP0C02")) |
| 146 | Name(_UID, 1) |
| 147 | |
| 148 | Name(PDRS, ResourceTemplate() { |
| 149 | Memory32Fixed(ReadWrite, CONFIG_ESRAM_BASE, 0x80000) |
| 150 | Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE) |
| 151 | Memory32Fixed(ReadWrite, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE) |
| 152 | IO(Decode16, SPI_DMA_BASE_ADDRESS, SPI_DMA_BASE_ADDRESS, 0x0010, SPI_DMA_BASE_SIZE) |
| 153 | IO(Decode16, GPIO_BASE_ADDRESS, GPIO_BASE_ADDRESS, 0x0080, GPIO_BASE_SIZE) |
| 154 | IO(Decode16, WDT_BASE_ADDRESS, WDT_BASE_ADDRESS, 0x0040, WDT_BASE_SIZE) |
| 155 | }) |
| 156 | |
| 157 | /* Current Resource Settings */ |
| 158 | Method(_CRS, 0, Serialized) |
| 159 | { |
| 160 | Return (PDRS) |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | Method(_OSC, 4) |
| 165 | { |
| 166 | /* Check for proper GUID */ |
| 167 | If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { |
| 168 | /* Let OS control everything */ |
| 169 | Return (Arg3) |
| 170 | } Else { |
| 171 | /* Unrecognized UUID */ |
| 172 | CreateDWordField(Arg3, 0, CDW1) |
| 173 | Or(CDW1, 4, CDW1) |
| 174 | Return (Arg3) |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | /* LPC Bridge 0:1f.0 */ |
| 179 | #include "lpc.asl" |
| 180 | |
| 181 | /* IRQ routing for each PCI device */ |
| 182 | #include <asm/acpi/irqroute.asl> |
| 183 | } |