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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefan Roese76ba23f2014-11-07 14:10:41 +01002/*
3 * Copyright (C) 2012 Altera Corporation <www.altera.com>
Stefan Roese76ba23f2014-11-07 14:10:41 +01004 */
5
6/dts-v1/;
7/* First 4KB has trampoline code for secondary cores. */
8/memreserve/ 0x00000000 0x0001000;
9#include "socfpga.dtsi"
10
11/ {
12 soc {
13 clkmgr@ffd04000 {
14 clocks {
15 osc1 {
16 clock-frequency = <25000000>;
17 };
18 };
19 };
20
21 mmc0: dwmmc0@ff704000 {
22 num-slots = <1>;
23 broken-cd;
24 bus-width = <4>;
25 cap-mmc-highspeed;
26 cap-sd-highspeed;
Chin Liang Seed6391a82015-11-26 09:44:11 +080027 drvsel = <3>;
28 smplsel = <0>;
Stefan Roese76ba23f2014-11-07 14:10:41 +010029 };
30
Stefan Roese76ba23f2014-11-07 14:10:41 +010031 sysmgr@ffd08000 {
32 cpu1-start-addr = <0xffd080c4>;
33 };
34 };
35};