| Mike Looijmans | 5ae48b1 | 2016-09-30 08:13:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved. |
| 3 | * (c) Copyright 2016 Topic Embedded Products. |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #define OPCODE_EXIT 0U |
| 9 | #define OPCODE_MASKWRITE 0U |
| 10 | #define OPCODE_MASKPOLL 1U |
| 11 | #define OPCODE_MASKDELAY 2U |
| 12 | #define OPCODE_ADDRESS_MASK (~3U) |
| 13 | |
| 14 | /* Sentinel */ |
| 15 | #define EMIT_EXIT() OPCODE_EXIT |
| 16 | /* Opcode is in lower 2 bits of address, address is always 4-byte aligned */ |
| 17 | #define EMIT_MASKWRITE(addr, mask, val) OPCODE_MASKWRITE | addr, mask, val |
| 18 | #define EMIT_MASKPOLL(addr, mask) OPCODE_MASKPOLL | addr, mask |
| 19 | #define EMIT_MASKDELAY(addr, mask) OPCODE_MASKDELAY | addr, mask |
| 20 | |
| 21 | /* Returns codes of ps7_init* */ |
| 22 | #define PS7_INIT_SUCCESS (0) |
| 23 | #define PS7_INIT_CORRUPT (1) |
| 24 | #define PS7_INIT_TIMEOUT (2) |
| 25 | #define PS7_POLL_FAILED_DDR_INIT (3) |
| 26 | #define PS7_POLL_FAILED_DMA (4) |
| 27 | #define PS7_POLL_FAILED_PLL (5) |
| 28 | |
| 29 | /* Called by spl.c */ |
| 30 | int ps7_init(void); |
| 31 | int ps7_post_config(void); |
| 32 | |
| 33 | /* Defined in ps7_init_common.c */ |
| 34 | int ps7_config(unsigned long *ps7_config_init); |