blob: 75a432c17e87401dedf9196c4abd6fd30b6ffd31 [file] [log] [blame]
Ben Whitten7b8f9af2017-11-23 13:47:47 +00001/*
2 * Configuation settings for the WB45N CPU Module.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __CONFIG_H__
8#define __CONFIG_H__
9
10#include <asm/hardware.h>
11
Ben Whitten7b8f9af2017-11-23 13:47:47 +000012/* ARM asynchronous clock */
13#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
14#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
15
16#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
17#define CONFIG_SETUP_MEMORY_TAGS
18#define CONFIG_INITRD_TAG
19#define CONFIG_SKIP_LOWLEVEL_INIT
20
21/* general purpose I/O */
22#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
23#define CONFIG_AT91_GPIO
24
25/* serial console */
26#define CONFIG_ATMEL_USART
27#define CONFIG_USART_BASE ATMEL_BASE_DBGU
28#define CONFIG_USART_ID ATMEL_ID_SYS
29
30/*
31 * BOOTP options
32 */
33#define CONFIG_BOOTP_BOOTFILESIZE
34#define CONFIG_BOOTP_BOOTPATH
35#define CONFIG_BOOTP_GATEWAY
36#define CONFIG_BOOTP_HOSTNAME
37
38/* SDRAM */
39#define CONFIG_NR_DRAM_BANKS 1
40#define CONFIG_SYS_SDRAM_BASE 0x20000000
41#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
42
43#define CONFIG_SYS_INIT_SP_ADDR \
44 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
45
46/* NAND flash */
47#define CONFIG_NAND_ATMEL
48#define CONFIG_SYS_MAX_NAND_DEVICE 1
49#define CONFIG_SYS_NAND_BASE 0x40000000
50/* our ALE is AD21 */
51#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
52/* our CLE is AD22 */
53#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
54#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
55#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
56
57/* PMECC & PMERRLOC */
58#define CONFIG_ATMEL_NAND_HWECC 1
59#define CONFIG_ATMEL_NAND_HW_PMECC 1
60#define CONFIG_PMECC_CAP 4
61#define CONFIG_PMECC_SECTOR_SIZE 512
62
63#define CONFIG_MTD_DEVICE
64#define CONFIG_CMD_MTDPARTS
65#define CONFIG_MTD_PARTITIONS
66#define CONFIG_RBTREE
67#define CONFIG_LZO
68
69/* Ethernet */
70#define CONFIG_MACB
71#define CONFIG_RMII
72#define CONFIG_NET_RETRY_COUNT 20
73#define CONFIG_MACB_SEARCH_PHY
74#define CONFIG_ETHADDR C0:EE:40:00:00:00
75#define CONFIG_ENV_OVERWRITE 1
76
77/* System */
78#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
79#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
80#define CONFIG_SYS_MEMTEST_END 0x23e00000
81
82#ifdef CONFIG_SYS_USE_NANDFLASH
83/* bootstrap + u-boot + env + linux in nandflash */
84#define CONFIG_ENV_OFFSET 0xa0000
85#define CONFIG_ENV_OFFSET_REDUND 0xc0000
86#define CONFIG_ENV_SIZE 0x20000 /* 1 block = 128 kB */
87
88#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
89 "run _mtd; bootm"
90
91#define MTDIDS_DEFAULT "nand0=atmel_nand"
92#define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \
93 "128K(at91bs)," \
94 "512K(u-boot)," \
95 "128K(u-boot-env)," \
96 "128K(redund-env)," \
97 "2560K(kernel-a)," \
98 "2560K(kernel-b)," \
99 "38912K(rootfs-a)," \
100 "38912K(rootfs-b)," \
101 "46208K(user)," \
102 "512K(logs)"
103
104#else
105#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
106#endif
107
108#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk " \
109 "rw noinitrd mem=64M " \
110 "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
111
112#define CONFIG_EXTRA_ENV_SETTINGS \
113 "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
114 "autoload=no\0" \
115 "autostart=no\0" \
116 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
117 "\0"
118
119#define CONFIG_SYS_CBSIZE 256
120#define CONFIG_SYS_MAXARGS 16
121#define CONFIG_SYS_LONGHELP
122#define CONFIG_CMDLINE_EDITING
123#define CONFIG_AUTO_COMPLETE
124
125/*
126 * Size of malloc() pool
127 */
128#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
129
130/* SPL */
Ben Whitten7b8f9af2017-11-23 13:47:47 +0000131#define CONFIG_SPL_TEXT_BASE 0x300000
132#define CONFIG_SPL_MAX_SIZE 0x6000
133#define CONFIG_SPL_STACK 0x308000
134
135#define CONFIG_SPL_BSS_START_ADDR 0x20000000
136#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
137#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
138#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
139
140#define CONFIG_SYS_MONITOR_LEN (512 << 10)
141
142#define CONFIG_SYS_MASTER_CLOCK 132096000
143#define CONFIG_SYS_AT91_PLLA 0x20c73f03
144#define CONFIG_SYS_MCKR 0x1301
145#define CONFIG_SYS_MCKR_CSS 0x1302
146
147#define CONFIG_SPL_NAND_DRIVERS
148#define CONFIG_SPL_NAND_BASE
149#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
150#define CONFIG_SYS_NAND_5_ADDR_CYCLE
151#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
152#define CONFIG_SYS_NAND_PAGE_COUNT 64
153#define CONFIG_SYS_NAND_OOBSIZE 64
154#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
155#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
156#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
157
158#endif /* __CONFIG_H__ */