blob: 6ccbf02db06e67aded8f2bf06fb906d81ebf68e8 [file] [log] [blame]
Martyn Welch56f96e62022-10-25 10:55:02 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Based on vendor support provided by AVNET Embedded
4 *
5 * Copyright (C) 2021 AVNET Embedded, MSC Technologies GmbH
6 * Copyright 2021 General Electric Company
7 * Copyright 2021 Collabora Ltd.
8 */
9
10#include <common.h>
11#include <errno.h>
12#include <miiphy.h>
13#include <netdev.h>
14#include <asm/arch/clock.h>
15#include <asm/arch/imx8mp_pins.h>
16#include <asm/arch/sys_proto.h>
17#include <asm/mach-imx/gpio.h>
18#include <asm/mach-imx/iomux-v3.h>
19#include <asm-generic/gpio.h>
20#include <linux/delay.h>
21
22DECLARE_GLOBAL_DATA_PTR;
23
24static void setup_fec(void)
25{
26 struct iomuxc_gpr_base_regs *gpr =
27 (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
28
29 /* Enable RGMII TX clk output */
30 setbits_le32(&gpr->gpr[1], BIT(22));
31}
32
Martyn Welch56f96e62022-10-25 10:55:02 +010033int board_phy_config(struct phy_device *phydev)
34{
35 if (phydev->drv->config)
36 phydev->drv->config(phydev);
37 return 0;
38}
39
40int board_init(void)
41{
42 setup_fec();
43
Martyn Welch56f96e62022-10-25 10:55:02 +010044 return 0;
45}