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Wolfgang Denke1ebacb2005-09-25 15:59:01 +02001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2004
10 * BEC Systems <http://bec-systems.com>
11 * Cliff Brake <cliff.brake@gmail.com>
12 * Support for Accelent/Vibren PXA255 IDP
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33#include <common.h>
Ben Warren0fd6aae2009-10-04 22:37:03 -070034#include <netdev.h>
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020035#include <command.h>
36
Wolfgang Denk6405a152006-03-31 18:32:53 +020037DECLARE_GLOBAL_DATA_PTR;
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020038
39/*
40 * Miscelaneous platform dependent initialisations
41 */
42
43int board_init (void)
44{
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020045 /* memory and cpu-speed are setup before relocation */
46 /* so we do _nothing_ here */
47
48 /* arch number of Lubbock-Board */
49 gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
50
51 /* adress of boot parameters */
52 gd->bd->bi_boot_params = 0xa0000100;
53
54 /* turn on serial ports */
55 *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
56
57 /* set PWM for LCD */
58 /* a value that works is 60Hz, 77% duty cycle */
59 CKEN |= CKEN0_PWM0;
60 PWM_CTRL0 = 0x3f;
61 PWM_PERVAL0 = 0x3ff;
62 PWM_PWDUTY0 = 792;
63
64 /* clear reset to AC97 codec */
65 CKEN |= CKEN2_AC97;
66 GCR = GCR_COLD_RST;
67
68 /* enable LCD backlight */
69 /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
70
71 /* test display */
72 /* lcd_puts("This is a test\nTest #2\n"); */
73
74 return 0;
75}
76
77int board_late_init(void)
78{
79 setenv("stdout", "serial");
80 setenv("stderr", "serial");
81 return 0;
82}
83
84
85int dram_init (void)
86{
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020087 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
88 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
89 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
90 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
91 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
92 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
93 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
94 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
95
96 return 0;
97}
98
99
100#ifdef DEBUG_BLINKC_ENABLE
101
102void delay_c(void)
103{
104 /* reset OSCR to 0 */
105 OSCR = 0;
106 while(OSCR > 0x10000)
107 ;
108
109 while(OSCR < 0xd4000)
110 ;
111}
112
113void blink_c(void)
114{
115 int led_bit = (1<<10);
116
117 GPDR0 = led_bit;
118 GPCR0 = led_bit;
119 delay_c();
120 GPSR0 = led_bit;
121 delay_c();
122 GPCR0 = led_bit;
123}
124
125int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
126{
127 printf("IDPCMD started\n");
128 return 0;
129}
130
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200131U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600132 "custom IDP command",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200133 "no args at this time"
Wolfgang Denke1ebacb2005-09-25 15:59:01 +0200134);
135
136#endif
Ben Warren0fd6aae2009-10-04 22:37:03 -0700137
138#ifdef CONFIG_CMD_NET
139int board_eth_init(bd_t *bis)
140{
141 int rc = 0;
142#ifdef CONFIG_SMC91111
143 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
144#endif
145 return rc;
146}
147#endif