blob: 4e92a3115907771da1bc826118c19528a0c2a58f [file] [log] [blame]
Stefan Kristianssoncfbf96b2011-11-26 19:04:52 +00001/*
2 * (C) Copyright 2011, Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
3 * (C) Copyright 2011, Julius Baxter <julius@opencores.org>
4 * (C) Copyright 2003
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/system.h>
28#include <asm/openrisc_exc.h>
29
30static ulong timestamp;
31
32/* how many counter cycles in a jiffy */
33#define TIMER_COUNTER_CYCLES (CONFIG_SYS_CLK_FREQ/CONFIG_SYS_OPENRISC_TMR_HZ)
34/* how many ms elapses between each timer interrupt */
35#define TIMER_TIMESTAMP_INC (1000/CONFIG_SYS_OPENRISC_TMR_HZ)
36/* how many cycles per ms */
37#define TIMER_CYCLES_MS (CONFIG_SYS_CLK_FREQ/1000)
38/* how many cycles per us */
39#define TIMER_CYCLES_US (CONFIG_SYS_CLK_FREQ/1000000uL)
40
41void timer_isr(void)
42{
43 timestamp += TIMER_TIMESTAMP_INC;
44 mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT |
45 (TIMER_COUNTER_CYCLES & SPR_TTMR_TP));
46}
47
48int timer_init(void)
49{
50 /* Install timer exception handler */
51 exception_install_handler(EXC_TIMER, timer_isr);
52
53 /* Set up the timer for the first expiration. */
54 timestamp = 0;
55
56 mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT |
57 (TIMER_COUNTER_CYCLES & SPR_TTMR_TP));
58
59 /* Enable tick timer exception in supervisor register */
60 mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
61
62 return 0;
63}
64
65void reset_timer(void)
66{
67 timestamp = 0;
68
69 mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT |
70 (TIMER_COUNTER_CYCLES & SPR_TTMR_TP));
71}
72
73/*
74 * The timer value in ms is calculated by taking the
75 * value accumulated by full timer revolutions plus the value
76 * accumulated in this period
77 */
78ulong get_timer(ulong base)
79{
80 return timestamp + mfspr(SPR_TTCR)/TIMER_CYCLES_MS - base;
81}
82
83void set_timer(ulong t)
84{
85 reset_timer();
86 timestamp = t;
87}
88
89void __udelay(ulong usec)
90{
91 ulong elapsed = 0;
92 ulong tick;
93 ulong last_tick;
94
95 last_tick = mfspr(SPR_TTCR);
96 while ((elapsed / TIMER_CYCLES_US) < usec) {
97 tick = mfspr(SPR_TTCR);
98 if (tick >= last_tick)
99 elapsed += (tick - last_tick);
100 else
101 elapsed += TIMER_COUNTER_CYCLES - (last_tick - tick);
102 last_tick = tick;
103 }
104}