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git01.mediatek.com / filogic / uboot / 0fbb8a77aba641dc398281414369062ed7bde055 / . / configs / T4240RDB_defconfig
blob: b931eb025f5ffeafe6315cbe232ceab7f63d03b8 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xEFF40000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x2000
4CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]6CONFIG_MPC85xx=y
7CONFIG_TARGET_T4240RDB=y
Hou Zhiqiang245d4922019-08-20 09:35:25 +0000[diff] [blame]8CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]9CONFIG_FIT=y
10CONFIG_FIT_VERBOSE=y
11CONFIG_OF_BOARD_SETUP=y
12CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]13CONFIG_BOOTDELAY=10
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]14CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]15CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]16CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]17CONFIG_CMD_GREPENV=y
Camelia Grozae8b72422021-04-13 19:48:02 +0300[diff] [blame]18CONFIG_CMD_DM=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]19CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]20CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]21CONFIG_CMD_USB=y
22CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]23CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]24CONFIG_CMD_PING=y
Siva Durga Prasad Paladugu8e45f1a2018-06-19 12:24:23 +0200[diff] [blame]25CONFIG_MP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]26CONFIG_CMD_EXT2=y
27CONFIG_CMD_FAT=y
Hou Zhiqiang245d4922019-08-20 09:35:25 +0000[diff] [blame]28CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]29CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]30CONFIG_ENV_IS_IN_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]31CONFIG_ENV_ADDR=0xEFF20000
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]32CONFIG_DM=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]33CONFIG_FSL_CAAM=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]34CONFIG_DM_I2C=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]35CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]36CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]37CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]38CONFIG_FLASH_CFI_DRIVER=y
39CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
40CONFIG_SYS_FLASH_CFI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]41CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]42CONFIG_SF_DEFAULT_MODE=0
43CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]44CONFIG_SPI_FLASH_SST=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]45CONFIG_PHYLIB=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]46CONFIG_PHYLIB_10G=y
Tom Rini84e35db2019-11-26 17:32:42 -0500[diff] [blame]47CONFIG_PHY_CORTINA=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]48CONFIG_PHY_TERANETICS=y
49CONFIG_PHY_VITESSE=y
Camelia Grozae8b72422021-04-13 19:48:02 +0300[diff] [blame]50CONFIG_DM_ETH=y
51CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]52CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]53CONFIG_E1000=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]54CONFIG_FMAN_ENET=y
55CONFIG_MII=y
Hou Zhiqiang90420022019-08-27 11:03:16 +0000[diff] [blame]56CONFIG_DM_PCI=y
57CONFIG_DM_PCI_COMPAT=y
58CONFIG_PCIE_FSL=y
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]59CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]60CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]61CONFIG_SPI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]62CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]63CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]64CONFIG_USB=y
Ran Wanga51b71b2019-12-12 17:31:07 +0800[diff] [blame]65CONFIG_DM_USB=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]66CONFIG_USB_STORAGE=y
Marek Szyprowski795dc7d2020-06-03 14:43:40 +0200[diff] [blame]67CONFIG_ADDR_MAP=y
68CONFIG_SYS_NUM_ADDR_MAP=64