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wdenkef3386f2004-10-10 21:27:30 +00001/*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkef3386f2004-10-10 21:27:30 +00006 */
7
8#include <common.h>
Thomas Chou0f9763f2014-08-25 17:09:07 +08009#include <asm/nios2.h>
Joachim Foersterf2924742011-10-20 10:28:10 +020010#include <asm/cache.h>
wdenkef3386f2004-10-10 21:27:30 +000011
Thomas Choucce3e752014-08-22 11:36:47 +080012DECLARE_GLOBAL_DATA_PTR;
13
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020014#if defined (CONFIG_SYS_NIOS_SYSID_BASE)
wdenk194b8392005-03-30 23:28:18 +000015extern void display_sysid (void);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020016#endif /* CONFIG_SYS_NIOS_SYSID_BASE */
wdenkef3386f2004-10-10 21:27:30 +000017
Thomas Choucce3e752014-08-22 11:36:47 +080018#ifdef CONFIG_DISPLAY_CPUINFO
19int print_cpuinfo(void)
wdenkef3386f2004-10-10 21:27:30 +000020{
21 printf ("CPU : Nios-II\n");
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020022#if !defined(CONFIG_SYS_NIOS_SYSID_BASE)
wdenkef3386f2004-10-10 21:27:30 +000023 printf ("SYSID : <unknown>\n");
24#else
wdenk194b8392005-03-30 23:28:18 +000025 display_sysid ();
wdenkef3386f2004-10-10 21:27:30 +000026#endif
27 return (0);
28}
Thomas Choucce3e752014-08-22 11:36:47 +080029#endif /* CONFIG_DISPLAY_CPUINFO */
wdenkef3386f2004-10-10 21:27:30 +000030
Mike Frysinger6d1f6982010-10-20 03:41:17 -040031int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenkef3386f2004-10-10 21:27:30 +000032{
Thomas Chou5975e792010-08-16 10:49:44 +080033 disable_interrupts();
34 /* indirect call to go beyond 256MB limitation of toolchain */
35 nios2_callr(CONFIG_SYS_RESET_ADDR);
36 return 0;
wdenkef3386f2004-10-10 21:27:30 +000037}
Joachim Foersterf2924742011-10-20 10:28:10 +020038
39int dcache_status(void)
40{
41 return 1;
42}
43
44void dcache_enable(void)
45{
46 flush_dcache(CONFIG_SYS_DCACHE_SIZE, CONFIG_SYS_DCACHELINE_SIZE);
47}
48
49void dcache_disable(void)
50{
51 flush_dcache(CONFIG_SYS_DCACHE_SIZE, CONFIG_SYS_DCACHELINE_SIZE);
52}
Thomas Choucce3e752014-08-22 11:36:47 +080053
54int arch_cpu_init(void)
55{
56 gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
57 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
58
59 return 0;
60}