Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 0f73ac6c3f5f9280c288aef522fe3fdc4b6f023b / . / configs / stm32f746-disco_defconfig
blob: be030bfb3714139c9a11bf8e969d1518253191dc [file] [log] [blame]
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]1CONFIG_ARM=y
Trevor Woerner2bcc1ed2020-05-06 08:02:42 -0400[diff] [blame]2CONFIG_ARCH_STM32=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x08008000
Patrice Chotarda5ad4b82018-11-26 13:42:32 +0100[diff] [blame]4CONFIG_SYS_MALLOC_F_LEN=0xE00
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SIZE=0x2000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]7CONFIG_STM32F7=y
8CONFIG_TARGET_STM32F746_DISCO=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]9CONFIG_SPL_TEXT_BASE=0x8000000
Patrice Chotard1bc56c52019-02-21 10:12:08 +0100[diff] [blame]10CONFIG_DISTRO_DEFAULTS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]11CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]12CONFIG_USE_BOOTARGS=y
13CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
Patrice Chotard1bc56c52019-02-21 10:12:08 +0100[diff] [blame]14# CONFIG_USE_BOOTCOMMAND is not set
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]15# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]16# CONFIG_DISPLAY_BOARDINFO is not set
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]17CONFIG_BOARD_EARLY_INIT_F=y
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]18CONFIG_SYS_PROMPT="U-Boot > "
19CONFIG_AUTOBOOT_KEYED=y
20CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
21CONFIG_AUTOBOOT_STOP_STR=" "
Patrice Chotardf2d7dce2017-12-12 10:15:00 +0100[diff] [blame]22CONFIG_CMD_GPT=y
23# CONFIG_RANDOM_UUID is not set
24CONFIG_CMD_MMC=y
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]25# CONFIG_CMD_SETEXPR is not set
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]26CONFIG_CMD_SNTP=y
27CONFIG_CMD_DNS=y
28CONFIG_CMD_LINK_LOCAL=y
yannick fertre4d371bd2018-03-02 15:59:29 +0100[diff] [blame]29CONFIG_CMD_BMP=y
Patrice Chotarddd67dcd02018-08-03 11:46:15 +0200[diff] [blame]30CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]31CONFIG_CMD_TIMER=y
Patrice Chotard0f5e63e2018-02-28 16:49:55 +0100[diff] [blame]32# CONFIG_SPL_DOS_PARTITION is not set
Patrice Chotard1bc56c52019-02-21 10:12:08 +0100[diff] [blame]33# CONFIG_ISO_PARTITION is not set
Patrice Chotardf2d7dce2017-12-12 10:15:00 +0100[diff] [blame]34# CONFIG_SPL_EFI_PARTITION is not set
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]35CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]36CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]37CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]38CONFIG_NET_RANDOM_ETHADDR=y
39CONFIG_NETCONSOLE=y
Patrice Chotardf2d7dce2017-12-12 10:15:00 +0100[diff] [blame]40CONFIG_DM_MMC=y
41# CONFIG_SPL_DM_MMC is not set
42CONFIG_ARM_PL180_MMCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]43CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]44CONFIG_DM_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]45CONFIG_MTD_NOR_FLASH=y
Michael Kurz337ff2a2017-01-22 16:04:30 +0100[diff] [blame]46CONFIG_DM_SPI_FLASH=y
Patrice Chotarded7fce32019-02-22 15:04:43 +0100[diff] [blame]47CONFIG_SPI_FLASH_MACRONIX=y
Michael Kurz337ff2a2017-01-22 16:04:30 +0100[diff] [blame]48CONFIG_SPI_FLASH_STMICRO=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]49CONFIG_PHY_SMSC=y
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]50CONFIG_DM_ETH=y
51CONFIG_ETH_DESIGNWARE=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]52CONFIG_MII=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]53# CONFIG_PINCTRL_FULL is not set
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]54CONFIG_SPI=y
Michael Kurz337ff2a2017-01-22 16:04:30 +0100[diff] [blame]55CONFIG_DM_SPI=y
56CONFIG_STM32_QSPI=y
yannick fertre4d371bd2018-03-02 15:59:29 +0100[diff] [blame]57CONFIG_DM_VIDEO=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]58CONFIG_BACKLIGHT_GPIO=y
yannick fertre4d371bd2018-03-02 15:59:29 +0100[diff] [blame]59CONFIG_VIDEO_STM32=y
60CONFIG_VIDEO_STM32_MAX_XRES=480
61CONFIG_VIDEO_STM32_MAX_YRES=640
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]62CONFIG_OF_LIBFDT_OVERLAY=y