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git01.mediatek.com / filogic / uboot / 0f2dcb9022a0db684ea6a49409697bc97a55bd8a / . / configs / spring_defconfig
blob: 2af8184be45cd6d10ba8a1ccadd953d3ca929b17 [file] [log] [blame]
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_EXYNOS=y
3CONFIG_TARGET_SPRING=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]4CONFIG_DM_I2C=y
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"
6CONFIG_SPL=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]7CONFIG_FIT=y
8CONFIG_FIT_BEST_MATCH=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]9CONFIG_HUSH_PARSER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]10CONFIG_SYS_PROMPT="spring # "
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]11# CONFIG_CMD_IMLS is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame^]12CONFIG_CMD_SF=y
13CONFIG_CMD_SPI=y
14CONFIG_CMD_I2C=y
15CONFIG_CMD_USB=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]16CONFIG_CMD_GPIO=y
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]17# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame^]18CONFIG_CMD_DHCP=y
19CONFIG_CMD_PING=y
20CONFIG_CMD_TIME=y
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]21CONFIG_CMD_SOUND=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]22CONFIG_CMD_PMIC=y
23CONFIG_CMD_REGULATOR=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]24CONFIG_CMD_TPM=y
Simon Glass81ab5472015-08-22 18:31:43 -0600[diff] [blame]25CONFIG_CMD_TPM_TEST=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]26CONFIG_DM_I2C_COMPAT=y
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]27CONFIG_I2C_CROS_EC_LDO=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]28CONFIG_I2C_MUX=y
29CONFIG_I2C_ARB_GPIO_CHALLENGE=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]30CONFIG_CROS_EC_KEYB=y
31CONFIG_CMD_CROS_EC=y
32CONFIG_CROS_EC=y
33CONFIG_CROS_EC_I2C=y
34CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]35CONFIG_SPI_FLASH_GIGADEVICE=y
36CONFIG_SPI_FLASH_WINBOND=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]37CONFIG_DM_PMIC=y
38CONFIG_DM_PMIC_MAX77686=y
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]39CONFIG_PMIC_S5M8767=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]40CONFIG_PMIC_TPS65090=y
41CONFIG_DM_REGULATOR=y
42CONFIG_DM_REGULATOR_MAX77686=y
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]43CONFIG_REGULATOR_S5M8767=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]44CONFIG_REGULATOR_TPS65090=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]45CONFIG_DEBUG_UART=y
46CONFIG_DEBUG_UART_S5P=y
47CONFIG_DEBUG_UART_BASE=0x12c30000
48CONFIG_DEBUG_UART_CLOCK=100000000
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]49CONFIG_SOUND=y
50CONFIG_I2S=y
51CONFIG_I2S_SAMSUNG=y
52CONFIG_SOUND_MAX98095=y
53CONFIG_SOUND_WM8994=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]54CONFIG_EXYNOS_SPI=y
Christophe Ricard8759ff82015-10-06 22:54:41 +0200[diff] [blame]55CONFIG_TPM_TIS_INFINEON=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]56CONFIG_USB=y
57CONFIG_DM_USB=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]58CONFIG_VIDEO_BRIDGE=y
59CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]60CONFIG_TPM=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]61CONFIG_ERRNO_STR=y