| Enric Balletbò i Serra | 9d89b08 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_AM335X_SL50=y |
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 3 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| Enric Balletbò i Serra | 9d89b08 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 4 | CONFIG_SPL=y |
| 5 | CONFIG_SPL_STACK_R=y |
| Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 6 | CONFIG_FIT=y |
| Enric Balletbò i Serra | 9d89b08 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 7 | CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" |
| Tom Rini | f852e73 | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 8 | CONFIG_HUSH_PARSER=y |
| Enric Balletbò i Serra | 9d89b08 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 9 | # CONFIG_CMD_IMLS is not set |
| 10 | # CONFIG_CMD_FLASH is not set |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame^] | 11 | CONFIG_CMD_SPI=y |
| 12 | CONFIG_CMD_I2C=y |
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 13 | CONFIG_CMD_GPIO=y |
| Enric Balletbò i Serra | 9d89b08 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 14 | # CONFIG_CMD_SETEXPR is not set |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame^] | 15 | CONFIG_CMD_DHCP=y |
| 16 | CONFIG_CMD_PING=y |
| Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 17 | CONFIG_SYS_NS16550=y |
| Simon Glass | a66c541 | 2016-02-22 22:55:42 -0700 | [diff] [blame] | 18 | CONFIG_OF_LIBFDT=y |