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git01.mediatek.com / filogic / uboot / 0f2af88cfb48b94e4b5d3a70bab8e194577af316 / . / board / freescale / common / ngpixis.h
blob: 7a20ee015fa306d24275115517d3a60774857b69 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]2/**
Timur Tabi746e2f32011-01-21 16:03:57 -0600[diff] [blame]3 * Copyright 2010-2011 Freescale Semiconductor
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]4 * Author: Timur Tabi <timur@freescale.com>
5 *
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]6 * This file provides support for the ngPIXIS, a board-specific FPGA used on
7 * some Freescale reference boards.
8 */
9
10/* ngPIXIS register set. Hopefully, this won't change too much over time.
11 * Feel free to add board-specific #ifdefs where necessary.
12 */
13typedef struct ngpixis {
14 u8 id;
15 u8 arch;
16 u8 scver;
17 u8 csr;
18 u8 rst;
Kumar Galae38209e2011-02-09 02:00:08 +0000[diff] [blame]19 u8 serclk;
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]20 u8 aux;
21 u8 spd;
22 u8 brdcfg0;
Timur Tabi00072362010-05-20 11:16:16 -0500[diff] [blame]23 u8 brdcfg1; /* On some boards, this register is called 'dma' */
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]24 u8 addr;
Kumar Galae38209e2011-02-09 02:00:08 +0000[diff] [blame]25 u8 brdcfg2;
26 u8 gpiodir;
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]27 u8 data;
28 u8 led;
Kumar Galae38209e2011-02-09 02:00:08 +0000[diff] [blame]29 u8 tag;
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]30 u8 vctl;
31 u8 vstat;
32 u8 vcfgen0;
33 u8 res4;
34 u8 ocmcsr;
35 u8 ocmmsg;
36 u8 gmdbg;
37 u8 res5[2];
38 u8 sclk[3];
39 u8 dclk[3];
40 u8 watch;
41 struct {
42 u8 sw;
43 u8 en;
Timur Tabi04b4a882012-10-23 09:40:22 +0000[diff] [blame]44 } s[9]; /* s[0]..s[7] is SW1..SW8, and s[8] is SW11 */
Kumar Galaf2f5d7b2010-05-22 17:25:47 -0500[diff] [blame]45} __attribute__ ((packed)) ngpixis_t;
Timur Tabi4f332d22010-04-01 10:49:42 -0500[diff] [blame]46
47/* Pointer to the PIXIS register set */
48#define pixis ((ngpixis_t *)PIXIS_BASE)
49
50/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */
51#define PIXIS_SW(x) (pixis->s[(x) - 1].sw)
52
53/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */
54#define PIXIS_EN(x) (pixis->s[(x) - 1].en)
Timur Tabi746e2f32011-01-21 16:03:57 -0600[diff] [blame]55
56u8 pixis_read(unsigned int reg);
57void pixis_write(unsigned int reg, u8 value);
58
59#define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg))
60#define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value)