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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Hou Zhiqiang00787862016-06-28 20:18:14 +08002/*
3 * Copyright 2016 NXP Semiconductor, Inc.
Hou Zhiqiang00787862016-06-28 20:18:14 +08004 */
5#include <common.h>
Simon Glass0f2af882020-05-10 11:40:05 -06006#include <log.h>
Hou Zhiqiangc697bd12017-03-17 16:12:32 +08007#include <malloc.h>
Hou Zhiqiang00787862016-06-28 20:18:14 +08008#include <config.h>
9#include <errno.h>
Simon Glass274e0b02020-05-10 11:39:56 -060010#include <asm/cache.h>
Hou Zhiqiang00787862016-06-28 20:18:14 +080011#include <asm/system.h>
12#include <asm/types.h>
13#include <asm/arch/soc.h>
14#ifdef CONFIG_FSL_LSCH3
15#include <asm/arch/immap_lsch3.h>
16#elif defined(CONFIG_FSL_LSCH2)
17#include <asm/arch/immap_lsch2.h>
18#endif
19#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
20#include <asm/armv8/sec_firmware.h>
21#endif
Sumit Garge0f9e9b2016-09-01 12:56:44 -040022#ifdef CONFIG_CHAIN_OF_TRUST
23#include <fsl_validate.h>
24#endif
Hou Zhiqiang00787862016-06-28 20:18:14 +080025
Hou Zhiqiangc697bd12017-03-17 16:12:32 +080026#ifdef CONFIG_SYS_LS_PPA_FW_IN_NAND
27#include <nand.h>
28#elif defined(CONFIG_SYS_LS_PPA_FW_IN_MMC)
29#include <mmc.h>
30#endif
31
32DECLARE_GLOBAL_DATA_PTR;
33
Hou Zhiqiang00787862016-06-28 20:18:14 +080034int ppa_init(void)
35{
York Sune6b871e2017-05-15 08:51:59 -070036 unsigned int el = current_el();
Hou Zhiqiangc697bd12017-03-17 16:12:32 +080037 void *ppa_fit_addr;
Hou Zhiqiang00787862016-06-28 20:18:14 +080038 u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
Sumit Gargb6fa55e2017-09-01 13:55:01 +053039 u32 *loadable_l, *loadable_h;
Hou Zhiqiang00787862016-06-28 20:18:14 +080040 int ret;
41
Sumit Garge0f9e9b2016-09-01 12:56:44 -040042#ifdef CONFIG_CHAIN_OF_TRUST
Sumit Garg22a66f82017-04-20 05:09:12 +053043 uintptr_t ppa_esbc_hdr = 0;
Sumit Garge0f9e9b2016-09-01 12:56:44 -040044 uintptr_t ppa_img_addr = 0;
Sumit Garg22a66f82017-04-20 05:09:12 +053045#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
46 defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
47 void *ppa_hdr_ddr;
48#endif
Sumit Garge0f9e9b2016-09-01 12:56:44 -040049#endif
50
York Sune6b871e2017-05-15 08:51:59 -070051 /* Skip if running at lower exception level */
52 if (el < 3) {
53 debug("Skipping PPA init, running at EL%d\n", el);
54 return 0;
55 }
56
Hou Zhiqiang7f83a5f2016-07-29 19:26:34 +080057#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
Hou Zhiqiang00787862016-06-28 20:18:14 +080058 ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
Hou Zhiqiangc697bd12017-03-17 16:12:32 +080059 debug("%s: PPA image load from XIP\n", __func__);
Sumit Garg22a66f82017-04-20 05:09:12 +053060#ifdef CONFIG_CHAIN_OF_TRUST
61 ppa_esbc_hdr = CONFIG_SYS_LS_PPA_ESBC_ADDR;
62#endif
Hou Zhiqiangc697bd12017-03-17 16:12:32 +080063#else /* !CONFIG_SYS_LS_PPA_FW_IN_XIP */
64 size_t fw_length, fdt_header_len = sizeof(struct fdt_header);
65
66 /* Copy PPA image from MMC/SD/NAND to allocated memory */
67#ifdef CONFIG_SYS_LS_PPA_FW_IN_MMC
68 struct mmc *mmc;
69 int dev = CONFIG_SYS_MMC_ENV_DEV;
70 struct fdt_header *fitp;
71 u32 cnt;
Sumit Garg22a66f82017-04-20 05:09:12 +053072 u32 blk;
Hou Zhiqiangc697bd12017-03-17 16:12:32 +080073
74 debug("%s: PPA image load from eMMC/SD\n", __func__);
75
76 ret = mmc_initialize(gd->bd);
77 if (ret) {
78 printf("%s: mmc_initialize() failed\n", __func__);
79 return ret;
80 }
81 mmc = find_mmc_device(dev);
82 if (!mmc) {
83 printf("PPA: MMC cannot find device for PPA firmware\n");
84 return -ENODEV;
85 }
86
87 ret = mmc_init(mmc);
88 if (ret) {
89 printf("%s: mmc_init() failed\n", __func__);
90 return ret;
91 }
92
93 fitp = malloc(roundup(fdt_header_len, 512));
94 if (!fitp) {
95 printf("PPA: malloc failed for FIT header(size 0x%zx)\n",
96 roundup(fdt_header_len, 512));
97 return -ENOMEM;
98 }
99
Sumit Garg22a66f82017-04-20 05:09:12 +0530100 blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800101 cnt = DIV_ROUND_UP(fdt_header_len, 512);
102 debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n",
103 __func__, dev, blk, cnt);
Yinbo Zhu45c20bd2018-09-25 14:47:06 +0800104 ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, fitp);
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800105 if (ret != cnt) {
106 free(fitp);
107 printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n",
108 CONFIG_SYS_LS_PPA_FW_ADDR);
109 return -EIO;
110 }
111
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800112 ret = fdt_check_header(fitp);
113 if (ret) {
114 free(fitp);
115 printf("%s: fdt_check_header() failed\n", __func__);
116 return ret;
117 }
Sumit Garg22a66f82017-04-20 05:09:12 +0530118
119#ifdef CONFIG_CHAIN_OF_TRUST
120 ppa_hdr_ddr = malloc(CONFIG_LS_PPA_ESBC_HDR_SIZE);
121 if (!ppa_hdr_ddr) {
122 printf("PPA: malloc failed for PPA header\n");
123 return -ENOMEM;
124 }
125
126 blk = CONFIG_SYS_LS_PPA_ESBC_ADDR >> 9;
127 cnt = DIV_ROUND_UP(CONFIG_LS_PPA_ESBC_HDR_SIZE, 512);
Yinbo Zhu45c20bd2018-09-25 14:47:06 +0800128 ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, ppa_hdr_ddr);
Sumit Garg22a66f82017-04-20 05:09:12 +0530129 if (ret != cnt) {
130 free(ppa_hdr_ddr);
131 printf("MMC/SD read of PPA header failed\n");
132 return -EIO;
133 }
134 debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
135
Sumit Garg22a66f82017-04-20 05:09:12 +0530136 ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
137#endif
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800138
139 fw_length = fdt_totalsize(fitp);
140 free(fitp);
141
142 fw_length = roundup(fw_length, 512);
143 ppa_fit_addr = malloc(fw_length);
144 if (!ppa_fit_addr) {
145 printf("PPA: malloc failed for PPA image(size 0x%zx)\n",
146 fw_length);
147 return -ENOMEM;
148 }
149
Sumit Garg22a66f82017-04-20 05:09:12 +0530150 blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800151 cnt = DIV_ROUND_UP(fw_length, 512);
152 debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n",
153 __func__, dev, blk, cnt);
Yinbo Zhu45c20bd2018-09-25 14:47:06 +0800154 ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, ppa_fit_addr);
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800155 if (ret != cnt) {
156 free(ppa_fit_addr);
157 printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n",
158 CONFIG_SYS_LS_PPA_FW_ADDR);
159 return -EIO;
160 }
161
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800162#elif defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
163 struct fdt_header fit;
164
165 debug("%s: PPA image load from NAND\n", __func__);
166
167 nand_init();
Grygorii Strashko3f243552017-06-26 19:13:07 -0500168 ret = nand_read(get_nand_dev_by_index(0),
169 (loff_t)CONFIG_SYS_LS_PPA_FW_ADDR,
170 &fdt_header_len, (u_char *)&fit);
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800171 if (ret == -EUCLEAN) {
172 printf("NAND read of PPA FIT header at offset 0x%x failed\n",
173 CONFIG_SYS_LS_PPA_FW_ADDR);
174 return -EIO;
175 }
176
177 ret = fdt_check_header(&fit);
178 if (ret) {
179 printf("%s: fdt_check_header() failed\n", __func__);
180 return ret;
181 }
182
Sumit Garg22a66f82017-04-20 05:09:12 +0530183#ifdef CONFIG_CHAIN_OF_TRUST
184 ppa_hdr_ddr = malloc(CONFIG_LS_PPA_ESBC_HDR_SIZE);
185 if (!ppa_hdr_ddr) {
186 printf("PPA: malloc failed for PPA header\n");
187 return -ENOMEM;
188 }
189
190 fw_length = CONFIG_LS_PPA_ESBC_HDR_SIZE;
191
Grygorii Strashko3f243552017-06-26 19:13:07 -0500192 ret = nand_read(get_nand_dev_by_index(0),
193 (loff_t)CONFIG_SYS_LS_PPA_ESBC_ADDR,
194 &fw_length, (u_char *)ppa_hdr_ddr);
Sumit Garg22a66f82017-04-20 05:09:12 +0530195 if (ret == -EUCLEAN) {
196 free(ppa_hdr_ddr);
197 printf("NAND read of PPA firmware at offset 0x%x failed\n",
198 CONFIG_SYS_LS_PPA_FW_ADDR);
199 return -EIO;
200 }
201 debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
202
Sumit Garg22a66f82017-04-20 05:09:12 +0530203 ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
204#endif
205
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800206 fw_length = fdt_totalsize(&fit);
207
208 ppa_fit_addr = malloc(fw_length);
209 if (!ppa_fit_addr) {
210 printf("PPA: malloc failed for PPA image(size 0x%zx)\n",
211 fw_length);
212 return -ENOMEM;
213 }
214
Grygorii Strashko3f243552017-06-26 19:13:07 -0500215 ret = nand_read(get_nand_dev_by_index(0),
216 (loff_t)CONFIG_SYS_LS_PPA_FW_ADDR,
217 &fw_length, (u_char *)ppa_fit_addr);
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800218 if (ret == -EUCLEAN) {
219 free(ppa_fit_addr);
220 printf("NAND read of PPA firmware at offset 0x%x failed\n",
221 CONFIG_SYS_LS_PPA_FW_ADDR);
222 return -EIO;
223 }
Hou Zhiqiang00787862016-06-28 20:18:14 +0800224#else
225#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
226#endif
227
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800228#endif
229
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400230#ifdef CONFIG_CHAIN_OF_TRUST
231 ppa_img_addr = (uintptr_t)ppa_fit_addr;
232 if (fsl_check_boot_mode_secure() != 0) {
Sumit Garg22a66f82017-04-20 05:09:12 +0530233 /*
234 * In case of failure in validation, fsl_secboot_validate
235 * would not return back in case of Production environment
236 * with ITS=1. In Development environment (ITS=0 and
237 * SB_EN=1), the function may return back in case of
238 * non-fatal failures.
239 */
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400240 ret = fsl_secboot_validate(ppa_esbc_hdr,
Vinitha Pillai-B57223a4b3ded2017-03-23 13:48:14 +0530241 PPA_KEY_HASH,
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400242 &ppa_img_addr);
243 if (ret != 0)
Sumit Gargb6fa55e2017-09-01 13:55:01 +0530244 printf("SEC firmware(s) validation failed\n");
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400245 else
Sumit Gargb6fa55e2017-09-01 13:55:01 +0530246 printf("SEC firmware(s) validation Successful\n");
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400247 }
Sumit Garg22a66f82017-04-20 05:09:12 +0530248#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
249 defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
250 free(ppa_hdr_ddr);
251#endif
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400252#endif
253
Hou Zhiqiang00787862016-06-28 20:18:14 +0800254#ifdef CONFIG_FSL_LSCH3
255 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
256 boot_loc_ptr_l = &gur->bootlocptrl;
257 boot_loc_ptr_h = &gur->bootlocptrh;
Sumit Gargb6fa55e2017-09-01 13:55:01 +0530258
259 /* Assign addresses to loadable ptrs */
260 loadable_l = &gur->scratchrw[4];
261 loadable_h = &gur->scratchrw[5];
Hou Zhiqiang00787862016-06-28 20:18:14 +0800262#elif defined(CONFIG_FSL_LSCH2)
263 struct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);
264 boot_loc_ptr_l = &scfg->scratchrw[1];
265 boot_loc_ptr_h = &scfg->scratchrw[0];
Sumit Gargb6fa55e2017-09-01 13:55:01 +0530266
267 /* Assign addresses to loadable ptrs */
268 loadable_l = &scfg->scratchrw[2];
269 loadable_h = &scfg->scratchrw[3];
Hou Zhiqiang00787862016-06-28 20:18:14 +0800270#endif
271
272 debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n",
273 boot_loc_ptr_l, boot_loc_ptr_h);
Sumit Gargb6fa55e2017-09-01 13:55:01 +0530274 ret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h,
275 loadable_l, loadable_h);
Hou Zhiqiang00787862016-06-28 20:18:14 +0800276
Hou Zhiqiangc697bd12017-03-17 16:12:32 +0800277#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
278 defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
279 free(ppa_fit_addr);
280#endif
281
Hou Zhiqiang00787862016-06-28 20:18:14 +0800282 return ret;
283}