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Thomas Choufb798b12015-10-09 13:46:34 +08001menu "Timer Support"
2
3config TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -08004 bool "Enable driver model for timer drivers"
Thomas Choufb798b12015-10-09 13:46:34 +08005 depends on DM
6 help
Bin Meng8a7b8642015-11-13 00:11:14 -08007 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
Thomas Choufb798b12015-10-09 13:46:34 +08009 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
11
Philipp Tomsich4fac4ea2017-07-28 17:38:42 +020012config SPL_TIMER
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
15 help
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
19 SPL build.
20
21config TPL_TIMER
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
24 help
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
28 TPL build.
29
Simon Glass32f6c172016-02-24 09:14:49 -070030config TIMER_EARLY
31 bool "Allow timer to be used early in U-Boot"
32 depends on TIMER
33 help
34 In some cases the timer must be accessible before driver model is
35 active. Examples include when using CONFIG_TRACE to trace U-Boot's
36 execution before driver model is set up. Enable this option to
37 use an early timer. These functions must be supported by your timer
38 driver: timer_early_get_count() and timer_early_get_rate().
39
Thomas Chou221d2ac2015-10-22 22:28:53 +080040config ALTERA_TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -080041 bool "Altera timer support"
Thomas Chou221d2ac2015-10-22 22:28:53 +080042 depends on TIMER
43 help
Bin Meng8a7b8642015-11-13 00:11:14 -080044 Select this to enable a timer for Altera devices. Please find
Thomas Chou221d2ac2015-10-22 22:28:53 +080045 details on the "Embedded Peripherals IP User Guide" of Altera.
46
Wenyou.Yang@microchip.comce8a36f2017-08-15 17:40:26 +080047config ATMEL_PIT_TIMER
48 bool "Atmel periodic interval timer support"
49 depends on TIMER
50 help
51 Select this to enable a periodic interval timer for Atmel devices,
52 it is designed to offer maximum accuracy and efficient management,
53 even for systems with long response time.
54
Michal Simekc3caac52018-04-17 13:40:46 +020055config CADENCE_TTC_TIMER
56 bool "Cadence TTC (Triple Timer Counter)"
57 depends on TIMER
58 help
59 Enables support for the cadence ttc driver. This driver is present
60 on Xilinx Zynq and ZynqMP SoCs.
61
Marek Vasut442c0f12018-08-18 15:58:32 +020062config DESIGNWARE_APB_TIMER
63 bool "Designware APB Timer"
64 depends on TIMER
65 help
66 Enables support for the Designware APB Timer driver. This timer is
67 present on Altera SoCFPGA SoCs.
68
Thomas Chou7b059dc2015-10-30 15:35:52 +080069config SANDBOX_TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -080070 bool "Sandbox timer support"
Thomas Chou7b059dc2015-10-30 15:35:52 +080071 depends on SANDBOX && TIMER
72 help
73 Select this to enable an emulated timer for sandbox. It gets
74 time from host os.
75
Bin Mengb2aa4c52015-11-13 00:11:24 -080076config X86_TSC_TIMER
77 bool "x86 Time-Stamp Counter (TSC) timer support"
78 depends on TIMER && X86
Bin Mengb2aa4c52015-11-13 00:11:24 -080079 help
80 Select this to enable Time-Stamp Counter (TSC) timer for x86.
81
Mugunthan V Nafae3702015-12-24 16:08:07 +053082config OMAP_TIMER
83 bool "Omap timer support"
84 depends on TIMER
85 help
86 Select this to enable an timer for Omap devices.
87
maxims@google.comf57bd002017-01-18 13:44:55 -080088config AST_TIMER
89 bool "Aspeed ast2400/ast2500 timer support"
90 depends on TIMER
91 default y if ARCH_ASPEED
92 help
93 Select this to enable timer for Aspeed ast2400/ast2500 devices.
94 This is a simple sys timer driver, it is compatible with lib/time.c,
95 but does not support any interrupts. Even though SoC has 8 hardware
96 counters, they are all treated as a single device by this driver.
97 This is mostly because they all share several registers which
98 makes it difficult to completely separate them.
99
Patrice Chotard200a7992017-02-21 13:37:05 +0100100config STI_TIMER
101 bool "STi timer support"
102 depends on TIMER
103 default y if ARCH_STI
104 help
105 Select this to enable a timer for STi devices.
106
Vlad Zakharov8f2c1da2017-03-21 14:49:47 +0300107config ARC_TIMER
108 bool "ARC timer support"
109 depends on TIMER && ARC && CLK
110 help
111 Select this to enable built-in ARC timers.
112 ARC cores may have up to 2 built-in timers: timer0 and timer1,
113 usually at least one of them exists. Either of them is supported
114 in U-Boot.
115
rick6d564b82017-05-17 10:59:20 +0800116config AG101P_TIMER
rickf1113c92017-05-18 14:37:53 +0800117 bool "AG101P timer support"
118 depends on TIMER && NDS32
119 help
120 Select this to enable a timer for AG01P devices.
121
Rick Chenaf0861e2017-11-28 09:23:23 +0800122config ATCPIT100_TIMER
123 bool "ATCPIT100 timer support"
Rick Chenb8aa85d2017-11-23 12:48:46 +0800124 depends on TIMER
rick6d564b82017-05-17 10:59:20 +0800125 help
Rick Chenaf0861e2017-11-28 09:23:23 +0800126 Select this to enable a ATCPIT100 timer which will be embeded
127 in AE3XX, AE250 boards.
rick6d564b82017-05-17 10:59:20 +0800128
Philipp Tomsich02a61b72017-07-28 17:43:19 +0200129config ROCKCHIP_TIMER
130 bool "Rockchip timer support"
131 depends on TIMER
132 help
133 Select this to enable support for the timer found on
134 Rockchip devices.
135
Patrice Chotardfdfefdc2018-02-07 10:44:45 +0100136config STM32_TIMER
137 bool "STM32 timer support"
138 depends on TIMER
139 help
140 Select this to enable support for the timer found on
141 STM32 devices.
142
Mario Six3c516552018-08-06 10:23:38 +0200143config MPC83XX_TIMER
144 bool "MPC83xx timer support"
145 depends on TIMER
146 help
147 Select this to enable support for the timer found on
148 devices based on the MPC83xx family of SoCs.
149
Thomas Choufb798b12015-10-09 13:46:34 +0800150endmenu