Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Stefan Roese <sr@denx.de> |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 7 | #include <init.h> |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 8 | #include <asm/io.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 9 | #include <linux/bitops.h> |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 10 | |
Stefan Roese | bfb27b1 | 2018-10-09 08:59:15 +0200 | [diff] [blame] | 11 | #define MT76XX_GPIO1_MODE 0x10000060 |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 12 | |
| 13 | void board_debug_uart_init(void) |
| 14 | { |
Stefan Roese | bfb27b1 | 2018-10-09 08:59:15 +0200 | [diff] [blame] | 15 | void __iomem *gpio_mode; |
| 16 | |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 17 | /* Select UART2 mode instead of GPIO mode (default) */ |
Stefan Roese | bfb27b1 | 2018-10-09 08:59:15 +0200 | [diff] [blame] | 18 | gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100); |
| 19 | clrbits_le32(gpio_mode, GENMASK(27, 26)); |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 20 | } |
| 21 | |
| 22 | int board_early_init_f(void) |
| 23 | { |
| 24 | /* |
| 25 | * The pin muxing of UART2 also needs to be done, if debug uart |
| 26 | * is not enabled. So we need to call this function here as well. |
| 27 | */ |
| 28 | board_debug_uart_init(); |
| 29 | |
| 30 | return 0; |
| 31 | } |