blob: f1cb55f2bfe7e00e4016bc88e2acd3a175226248 [file] [log] [blame]
Pali Rohárdeb1e922022-02-23 14:15:47 +01001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
Pali Rohár0e6dce72022-02-23 14:15:48 +01004 * Copyright (C) 2021 Pali Rohár <pali@kernel.org>
Pali Rohárdeb1e922022-02-23 14:15:47 +01005 */
6
7#ifndef _MVEBU_MBOX_H
8#define _MVEBU_MBOX_H
9
10enum mbox_cmd {
11 MBOX_CMD_GET_RANDOM = 1,
12 MBOX_CMD_BOARD_INFO,
13 MBOX_CMD_ECDSA_PUB_KEY,
14 MBOX_CMD_HASH,
15 MBOX_CMD_SIGN,
16 MBOX_CMD_VERIFY,
17
18 MBOX_CMD_OTP_READ,
19 MBOX_CMD_OTP_WRITE,
Pali Rohár0e6dce72022-02-23 14:15:48 +010020
21 MBOX_CMD_REBOOT,
22
23 /* OTP read commands supported by Marvell fuse.bin firmware */
24 MBOX_CMD_OTP_READ_1B = 257,
25 MBOX_CMD_OTP_READ_8B,
26 MBOX_CMD_OTP_READ_32B,
27 MBOX_CMD_OTP_READ_64B,
28 MBOX_CMD_OTP_READ_256B,
29
30 /* OTP write commands supported by Marvell fuse.bin firmware */
31 MBOX_CMD_OTP_WRITE_1B = 513,
32 MBOX_CMD_OTP_WRITE_8B,
33 MBOX_CMD_OTP_WRITE_32B,
34 MBOX_CMD_OTP_WRITE_64B,
35 MBOX_CMD_OTP_WRITE_256B,
Pali Rohárdeb1e922022-02-23 14:15:47 +010036};
37
Pali Rohár0e6dce72022-02-23 14:15:48 +010038int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nin, u32 *out, int nout);
Pali Rohárdeb1e922022-02-23 14:15:47 +010039
40#endif