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Tom McLeod91d024c2017-09-27 17:53:26 -07001/*
2 * (C) Copyright 2012 Xilinx
3 * (C) Copyright 2017 Opal Kelly Inc.
4 *
5 * Configuration settings for the SYZYGY Hub development board
6 * See zynq-common.h for Zynq common configs
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#ifndef __CONFIG_SYZYGY_HUB_H
12#define __CONFIG_SYZYGY_HUB_H
13
Tom McLeod91d024c2017-09-27 17:53:26 -070014#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
15#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x57
Tom McLeod91d024c2017-09-27 17:53:26 -070016
17#define CONFIG_EXTRA_ENV_SETTINGS \
18 "fit_image=fit.itb\0" \
19 "bitstream_image=download.bit\0" \
20 "loadbit_addr=0x1000000\0" \
21 "load_addr=0x2000000\0" \
22 "fit_size=0x800000\0" \
23 "flash_off=0x100000\0" \
24 "nor_flash_off=0xE2100000\0" \
25 "fdt_high=0x20000000\0" \
26 "initrd_high=0x20000000\0" \
27 "loadbootenv_addr=0x2000000\0" \
28 "fdt_addr_r=0x1f00000\0" \
29 "pxefile_addr_r=0x2000000\0" \
30 "kernel_addr_r=0x2000000\0" \
31 "scriptaddr=0x3000000\0" \
32 "ramdisk_addr_r=0x3100000\0" \
33 "bootenv=uEnv.txt\0" \
34 "bootenv_dev=mmc\0" \
35 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
36 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
37 "env import -t ${loadbootenv_addr} $filesize\0" \
38 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
39 "setbootenv=if env run bootenv_existence_test; then " \
40 "if env run loadbootenv; then " \
41 "env run importbootenv; " \
42 "fi; " \
43 "fi; \0" \
44 "sd_loadbootenv=set bootenv_dev mmc && " \
45 "run setbootenv \0" \
46 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv\0" \
47 "preboot=if test $modeboot = sdboot; then " \
48 "run sd_loadbootenv; " \
49 "echo Checking if uenvcmd is set ...; " \
50 "if test -n $uenvcmd; then " \
51 "echo Running uenvcmd ...; " \
52 "run uenvcmd; " \
53 "fi; " \
54 "fi; \0" \
55 "sdboot=echo Copying FPGA Bitstream from SD to RAM... && " \
56 "load mmc 0 ${loadbit_addr} ${bitstream_image} && " \
57 "echo Programming FPGA... && " \
58 "fpga loadb 0 ${loadbit_addr} ${filesize} && " \
59 "echo Copying FIT from SD to RAM... && " \
60 "load mmc 0 ${load_addr} ${fit_image} && " \
61 "bootm ${load_addr}\0" \
62 "jtagboot=echo TFTPing FIT to RAM... && " \
63 "tftpboot ${load_addr} ${fit_image} && " \
64 "bootm ${load_addr}\0" \
65 DFU_ALT_INFO \
66 BOOTENV
67
68#include <configs/zynq-common.h>
69
70#endif /* __CONFIG_SYZYGY_HUB_H */