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Akshay Saraswata42e55a2013-03-20 21:00:56 +00001/*
2 * Advanced Crypto Engine - SHA Firmware
3 * Copyright (c) 2012 Samsung Electronics
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Akshay Saraswata42e55a2013-03-20 21:00:56 +00006 */
7#include <common.h>
Przemyslaw Marczak8d28e1b2014-03-25 10:58:21 +01008#include "ace_sha.h"
9
10#ifdef CONFIG_SHA_HW_ACCEL
Jeroen Hofsteebfe88fe2014-06-12 22:27:12 +020011#include <u-boot/sha256.h>
12#include <u-boot/sha1.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090013#include <linux/errno.h>
Akshay Saraswata42e55a2013-03-20 21:00:56 +000014
15/* SHA1 value for the message of zero length */
16static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
17 0xDA, 0x39, 0xA3, 0xEE, 0x5E, 0x6B, 0x4B, 0x0D,
18 0x32, 0x55, 0xBF, 0xFF, 0x95, 0x60, 0x18, 0x90,
19 0xAF, 0xD8, 0x07, 0x09};
20
21/* SHA256 value for the message of zero length */
22static const unsigned char sha256_digest_emptymsg[SHA256_SUM_LEN] = {
23 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14,
24 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24,
25 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C,
26 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55};
27
28int ace_sha_hash_digest(const unsigned char *pbuf, unsigned int buf_len,
29 unsigned char *pout, unsigned int hash_type)
30{
31 unsigned int i, reg, len;
32 unsigned int *pdigest;
33 struct exynos_ace_sfr *ace_sha_reg =
34 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
35
36 if (buf_len == 0) {
37 /* ACE H/W cannot compute hash value for empty string */
38 if (hash_type == ACE_SHA_TYPE_SHA1)
39 memcpy(pout, sha1_digest_emptymsg, SHA1_SUM_LEN);
40 else
41 memcpy(pout, sha256_digest_emptymsg, SHA256_SUM_LEN);
42 return 0;
43 }
44
45 /* Flush HRDMA */
46 writel(ACE_FC_HRDMACFLUSH_ON, &ace_sha_reg->fc_hrdmac);
47 writel(ACE_FC_HRDMACFLUSH_OFF, &ace_sha_reg->fc_hrdmac);
48
49 /* Set byte swap of data in */
50 writel(ACE_HASH_SWAPDI_ON | ACE_HASH_SWAPDO_ON | ACE_HASH_SWAPIV_ON,
51 &ace_sha_reg->hash_byteswap);
52
53 /* Select Hash input mux as external source */
54 reg = readl(&ace_sha_reg->fc_fifoctrl);
55 reg = (reg & ~ACE_FC_SELHASH_MASK) | ACE_FC_SELHASH_EXOUT;
56 writel(reg, &ace_sha_reg->fc_fifoctrl);
57
58 /* Set Hash as SHA1 or SHA256 and start Hash engine */
59 reg = (hash_type == ACE_SHA_TYPE_SHA1) ?
60 ACE_HASH_ENGSEL_SHA1HASH : ACE_HASH_ENGSEL_SHA256HASH;
61 reg |= ACE_HASH_STARTBIT_ON;
62 writel(reg, &ace_sha_reg->hash_control);
63
64 /* Enable FIFO mode */
65 writel(ACE_HASH_FIFO_ON, &ace_sha_reg->hash_fifo_mode);
66
67 /* Set message length */
68 writel(buf_len, &ace_sha_reg->hash_msgsize_low);
69 writel(0, &ace_sha_reg->hash_msgsize_high);
70
71 /* Set HRDMA */
72 writel((unsigned int)pbuf, &ace_sha_reg->fc_hrdmas);
73 writel(buf_len, &ace_sha_reg->fc_hrdmal);
74
75 while ((readl(&ace_sha_reg->hash_status) & ACE_HASH_MSGDONE_MASK) ==
76 ACE_HASH_MSGDONE_OFF) {
77 /*
78 * PRNG error bit goes HIGH if a PRNG request occurs without
79 * a complete seed setup. We are using this bit to check h/w
80 * fault because proper setup is not expected in that case.
81 */
82 if ((readl(&ace_sha_reg->hash_status)
83 & ACE_HASH_PRNGERROR_MASK) == ACE_HASH_PRNGERROR_ON)
84 return -EBUSY;
85 }
86
87 /* Clear MSG_DONE bit */
88 writel(ACE_HASH_MSGDONE_ON, &ace_sha_reg->hash_status);
89
90 /* Read hash result */
91 pdigest = (unsigned int *)pout;
92 len = (hash_type == ACE_SHA_TYPE_SHA1) ? SHA1_SUM_LEN : SHA256_SUM_LEN;
93
94 for (i = 0; i < len / 4; i++)
95 pdigest[i] = readl(&ace_sha_reg->hash_result[i]);
96
97 /* Clear HRDMA pending bit */
98 writel(ACE_FC_HRDMA, &ace_sha_reg->fc_intpend);
99
100 return 0;
101}
102
103void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
104 unsigned char *pout, unsigned int chunk_size)
105{
106 if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA256))
107 debug("ACE was not setup properly or it is faulty\n");
108}
109
110void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
111 unsigned char *pout, unsigned int chunk_size)
112{
113 if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
114 debug("ACE was not setup properly or it is faulty\n");
115}
Przemyslaw Marczak8d28e1b2014-03-25 10:58:21 +0100116#endif /* CONFIG_SHA_HW_ACCEL */
117
118#ifdef CONFIG_LIB_HW_RAND
119static unsigned int seed_done;
120
121void srand(unsigned int seed)
122{
123 struct exynos_ace_sfr *reg =
124 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
125 int i, status;
126
127 /* Seed data */
128 for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
129 writel(seed << i, &reg->hash_seed[i]);
130
131 /* Wait for seed setup done */
132 while (1) {
133 status = readl(&reg->hash_status);
134 if ((status & ACE_HASH_SEEDSETTING_MASK) ||
135 (status & ACE_HASH_PRNGERROR_MASK))
136 break;
137 }
138
139 seed_done = 1;
140}
141
142unsigned int rand(void)
143{
144 struct exynos_ace_sfr *reg =
145 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
146 int i, status;
147 unsigned int seed = (unsigned int)&status;
148 unsigned int ret = 0;
149
150 if (!seed_done)
151 srand(seed);
152
153 /* Start PRNG */
154 writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, &reg->hash_control);
155
156 /* Wait for PRNG done */
157 while (1) {
158 status = readl(&reg->hash_status);
159 if (status & ACE_HASH_PRNGDONE_MASK)
160 break;
161 if (status & ACE_HASH_PRNGERROR_MASK) {
162 seed_done = 0;
163 return 0;
164 }
165 }
166
167 /* Clear Done IRQ */
168 writel(ACE_HASH_PRNGDONE_MASK, &reg->hash_status);
169
170 /* Read a PRNG result */
171 for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
172 ret += readl(&reg->hash_prng[i]);
173
174 seed_done = 0;
175 return ret;
176}
177
178unsigned int rand_r(unsigned int *seedp)
179{
180 srand(*seedp);
181
182 return rand();
183}
184#endif /* CONFIG_LIB_HW_RAND */