blob: 2f5f20ea32decae9b1a2f34508a05bf16301f9d3 [file] [log] [blame]
Michal Simek952d5142007-03-11 13:42:58 +01001/*
2 * (C) Copyright 2007 Michal Simek
3 *
4 * Michal SIMEK <monstr@monstr.eu>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/* This is a board specific file. It's OK to include board specific
26 * header files */
27
28#include <common.h>
Michal Simekdda9bd82007-03-30 22:52:09 +020029#include <config.h>
Michal Simek7f581f02010-08-02 14:42:09 +020030#include <netdev.h>
Michal Simek9cabb362012-07-04 13:12:37 +020031#include <asm/processor.h>
Michal Simek9c817f82007-05-07 19:33:51 +020032#include <asm/microblaze_intc.h>
33#include <asm/asm.h>
Michal Simek23ccda02013-04-24 10:01:20 +020034#include <asm/gpio.h>
35
36#ifdef CONFIG_XILINX_GPIO
37static int reset_pin = -1;
38#endif
Michal Simek952d5142007-03-11 13:42:58 +010039
Mike Frysinger6d1f6982010-10-20 03:41:17 -040040int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Michal Simek952d5142007-03-11 13:42:58 +010041{
Michal Simek23ccda02013-04-24 10:01:20 +020042#ifdef CONFIG_XILINX_GPIO
43 if (reset_pin != -1)
44 gpio_direction_output(reset_pin, 1);
Michal Simek952d5142007-03-11 13:42:58 +010045#endif
Michal Simek25d20af2012-11-02 09:33:05 +010046
Michal Simek80e045f2013-04-22 11:23:16 +020047#ifdef CONFIG_XILINX_TB_WATCHDOG
48 hw_watchdog_disable();
49#endif
50
Michal Simek952d5142007-03-11 13:42:58 +010051 puts ("Reseting board\n");
Michal Simekc9446872012-11-07 15:27:39 +010052 __asm__ __volatile__ (" mts rmsr, r0;" \
53 "bra r0");
Michal Simek25d20af2012-11-02 09:33:05 +010054
Mike Frysinger6d1f6982010-10-20 03:41:17 -040055 return 0;
Michal Simek952d5142007-03-11 13:42:58 +010056}
57
58int gpio_init (void)
59{
Michal Simek23ccda02013-04-24 10:01:20 +020060#ifdef CONFIG_XILINX_GPIO
61 reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
62 if (reset_pin != -1)
63 gpio_request(reset_pin, "reset_pin");
Michal Simek952d5142007-03-11 13:42:58 +010064#endif
65 return 0;
66}
Michal Simek9c817f82007-05-07 19:33:51 +020067
Michal Simek9cabb362012-07-04 13:12:37 +020068void board_init(void)
69{
70 gpio_init();
Michal Simek9cabb362012-07-04 13:12:37 +020071}
72
Michal Simek7f581f02010-08-02 14:42:09 +020073int board_eth_init(bd_t *bis)
74{
Michal Simeka6745b82011-10-12 23:23:22 +000075 int ret = 0;
Michal Simek7a88e3a2011-08-31 11:51:50 +020076
77#ifdef CONFIG_XILINX_AXIEMAC
78 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
79 XILINX_AXIDMA_BASEADDR);
80#endif
81
Michal Simek7f581f02010-08-02 14:42:09 +020082#ifdef CONFIG_XILINX_EMACLITE
Michal Simeka6745b82011-10-12 23:23:22 +000083 u32 txpp = 0;
84 u32 rxpp = 0;
85# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
86 txpp = 1;
87# endif
88# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
89 rxpp = 1;
90# endif
91 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
92 txpp, rxpp);
Michal Simek7f581f02010-08-02 14:42:09 +020093#endif
Stephan Linzda949bc2012-02-25 00:48:34 +000094
95#ifdef CONFIG_XILINX_LL_TEMAC
96# ifdef XILINX_LLTEMAC_BASEADDR
97# ifdef XILINX_LLTEMAC_FIFO_BASEADDR
98 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
99 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
100# elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
101# if XILINX_LLTEMAC_SDMA_USE_DCR == 1
102 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
103 XILINX_LL_TEMAC_M_SDMA_DCR,
104 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
105# else
106 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
107 XILINX_LL_TEMAC_M_SDMA_PLB,
108 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
109# endif
110# endif
111# endif
112# ifdef XILINX_LLTEMAC_BASEADDR1
113# ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
114 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
115 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
116# elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
117# if XILINX_LLTEMAC_SDMA_USE_DCR == 1
118 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
119 XILINX_LL_TEMAC_M_SDMA_DCR,
120 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
121# else
122 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
123 XILINX_LL_TEMAC_M_SDMA_PLB,
124 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
125# endif
126# endif
127# endif
128#endif
129
Michal Simeka6745b82011-10-12 23:23:22 +0000130 return ret;
Michal Simek7f581f02010-08-02 14:42:09 +0200131}