blob: 70154409b1275c01ea8722d5bd233ad3fac79078 [file] [log] [blame]
Wadim Egorovabea3242023-12-20 10:18:10 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * phyCORE-AM62x dts file for R5 SPL with 2GB RAM
4 * Copyright (C) 2022 - 2023 Phytec Messtechnik GmbH
5 * Author: Wadim Egorov <w.egorov@phytec.de>
6 */
7
8#include "k3-am625-phyboard-lyra-rdk.dts"
9#include "k3-am62-phycore-som-ddr4-2gb.dtsi"
10#include "k3-am62-ddr.dtsi"
11
12#include "k3-am625-phyboard-lyra-rdk-u-boot.dtsi"
13
14/ {
15 aliases {
16 remoteproc0 = &sysctrler;
17 remoteproc1 = &a53_0;
18 serial0 = &wkup_uart0;
19 serial3 = &main_uart1;
20 };
21
22 a53_0: a53@0 {
23 compatible = "ti,am654-rproc";
24 reg = <0x00 0x00a90000 0x00 0x10>;
25 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
26 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
27 <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
28 resets = <&k3_reset 135 0>;
29 clocks = <&k3_clks 61 0>;
30 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
31 assigned-clock-parents = <&k3_clks 61 2>;
32 assigned-clock-rates = <200000000>, <1200000000>;
33 ti,sci = <&dmsc>;
34 ti,sci-proc-id = <32>;
35 ti,sci-host-id = <10>;
36 bootph-pre-ram;
37 };
38
39 dm_tifs: dm-tifs {
40 compatible = "ti,j721e-dm-sci";
41 ti,host-id = <36>;
42 ti,secure-host;
43 mbox-names = "rx", "tx";
44 mboxes= <&secure_proxy_main 22>,
45 <&secure_proxy_main 23>;
46 bootph-pre-ram;
47 };
48
49 memory@80000000 {
50 device_type = "memory";
51 /* 2G RAM */
52 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
53 bootph-pre-ram;
54 };
55};
56
57&secure_proxy_sa3 {
58 /* We require this for boot handshake */
59 status = "okay";
60};
61
62&cbass_main {
63 sysctrler: sysctrler {
64 compatible = "ti,am654-system-controller";
65 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
66 mbox-names = "tx", "rx", "boot_notify";
67 bootph-pre-ram;
68 };
69};
70
71&dmsc {
72 mboxes= <&secure_proxy_main 0>,
73 <&secure_proxy_main 1>,
74 <&secure_proxy_main 0>;
75 mbox-names = "rx", "tx", "notify";
76 ti,host-id = <35>;
77 ti,secure-host;
78};
79
80&main_bcdma {
81 ti,sci = <&dm_tifs>;
82};
83
84&main_pktdma {
85 ti,sci = <&dm_tifs>;
86};
87
88/* Main UART1 is used for TIFS firmware logs */
89&main_uart1 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&main_uart1_pins_default>;
92 status = "okay";
93 bootph-pre-ram;
94};
95
96&mcu_pmx0 {
97 wkup_uart0_pins_default: wkup-uart0-pins-default {
98 pinctrl-single,pins = <
99 AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
100 AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
101 AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
102 AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
103 >;
104 bootph-pre-ram;
105 };
106};
107
108&ospi0 {
109 reg = <0x00 0x0fc40000 0x00 0x100>,
110 <0x00 0x60000000 0x00 0x08000000>;
111};
112
113/* WKUP UART0 is used for DM firmware logs */
114&wkup_uart0 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&wkup_uart0_pins_default>;
117 status = "okay";
118 bootph-pre-ram;
119};