Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation; either version 2 of |
| 7 | * the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 17 | * MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #ifndef __CONFIG_H |
| 21 | #define __CONFIG_H |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 22 | |
| 23 | /* |
| 24 | * Define this to make U-Boot skip low level initialization when loaded |
| 25 | * by initial bootloader. Not required by NAND U-Boot version but IS |
| 26 | * required for a NOR version used to burn the real NOR U-Boot into |
| 27 | * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive |
| 28 | * so it is NOT possible to build a U-Boot with both NAND and NOR routines. |
| 29 | * NOR U-Boot is loaded directly from Flash so it must perform all the |
| 30 | * low level initialization itself. NAND version is loaded by an initial |
| 31 | * bootloader (UBL in TI-ese) that performs such an initialization so it's |
| 32 | * skipped in NAND version. The third DaVinci boot mode loads a bootloader |
| 33 | * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever) |
| 34 | * performing low level init prior to loading. All that means we can NOT use |
| 35 | * NAND version to put U-Boot into NOR because it doesn't have NOR support and |
| 36 | * we can NOT use NOR version because it performs low level initialization |
| 37 | * effectively destroying itself in DDR memory. That's why a separate NOR |
| 38 | * version with this define is needed. It is loaded via UART, then one uses |
| 39 | * it to somehow download a proper NOR version built WITHOUT this define to |
| 40 | * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze |
| 41 | * NOR support into the initial bootloader so it won't be needed but DaVinci |
| 42 | * static RAM might be too small for this (I have something like 2Kbytes left |
| 43 | * as of now, without NOR support) so this might've not happened... |
| 44 | * |
| 45 | #define CONFIG_NOR_UART_BOOT |
| 46 | */ |
| 47 | |
| 48 | /*=======*/ |
| 49 | /* Board */ |
| 50 | /*=======*/ |
| 51 | #define SONATA_BOARD |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 52 | #define CONFIG_SYS_NAND_SMALLPAGE |
| 53 | #define CONFIG_SYS_USE_NOR |
Christian Riesch | 74c6df2 | 2011-11-19 00:45:43 +0000 | [diff] [blame] | 54 | #define MACH_TYPE_SONATA 1254 |
| 55 | #define CONFIG_MACH_TYPE MACH_TYPE_SONATA |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 56 | /*===================*/ |
| 57 | /* SoC Configuration */ |
| 58 | /*===================*/ |
| 59 | #define CONFIG_ARM926EJS /* arm926ejs CPU core */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 60 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
| 61 | #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ |
| 62 | #define CONFIG_SYS_HZ 1000 |
David Brownell | 5f02add | 2009-05-15 23:44:08 +0200 | [diff] [blame] | 63 | #define CONFIG_SOC_DM644X |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 64 | /*====================================================*/ |
| 65 | /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ |
| 66 | /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ |
| 67 | /*====================================================*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
| 69 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 70 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 |
| 71 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 72 | /*=============*/ |
| 73 | /* Memory Info */ |
| 74 | /*=============*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 75 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ |
| 77 | #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 78 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 79 | #define CONFIG_STACKSIZE (256*1024) /* regular stack */ |
| 80 | #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ |
| 81 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ |
| 82 | #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ |
| 83 | /*====================*/ |
| 84 | /* Serial Driver info */ |
| 85 | /*====================*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_NS16550 |
| 87 | #define CONFIG_SYS_NS16550_SERIAL |
David Brownell | fedd22d | 2009-04-12 15:38:06 -0700 | [diff] [blame] | 88 | #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ |
David Brownell | 1fc5907 | 2009-04-12 15:40:16 -0700 | [diff] [blame] | 90 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 91 | #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |
| 92 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 94 | /*===================*/ |
| 95 | /* I2C Configuration */ |
| 96 | /*===================*/ |
| 97 | #define CONFIG_HARD_I2C |
| 98 | #define CONFIG_DRIVER_DAVINCI_I2C |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ |
| 100 | #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 101 | /*==================================*/ |
| 102 | /* Network & Ethernet Configuration */ |
| 103 | /*==================================*/ |
| 104 | #define CONFIG_DRIVER_TI_EMAC |
| 105 | #define CONFIG_MII |
| 106 | #define CONFIG_BOOTP_DEFAULT |
| 107 | #define CONFIG_BOOTP_DNS |
| 108 | #define CONFIG_BOOTP_DNS2 |
| 109 | #define CONFIG_BOOTP_SEND_HOSTNAME |
| 110 | #define CONFIG_NET_RETRY_COUNT 10 |
| 111 | /*=====================*/ |
| 112 | /* Flash & Environment */ |
| 113 | /*=====================*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | #ifdef CONFIG_SYS_USE_NAND |
Jean-Christophe PLAGNIOL-VILLARD | f681250 | 2009-03-30 18:58:39 +0200 | [diff] [blame] | 115 | #define CONFIG_NAND_DAVINCI |
Nick Thompson | 789c887 | 2009-12-12 12:12:26 -0500 | [diff] [blame] | 116 | #define CONFIG_SYS_NAND_CS 2 |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 117 | #undef CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 118 | #define CONFIG_SYS_NO_FLASH |
Wolfgang Denk | e577b65 | 2010-10-05 21:17:28 +0200 | [diff] [blame] | 119 | #define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */ |
Jean-Christophe PLAGNIOL-VILLARD | dda84dd | 2008-09-10 22:47:58 +0200 | [diff] [blame] | 120 | #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 121 | #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ |
Sandeep Paulraj | 391d1a6 | 2009-09-08 17:09:52 -0400 | [diff] [blame] | 122 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 123 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_NAND_BASE 0x02000000 |
| 125 | #define CONFIG_SYS_NAND_HW_ECC |
| 126 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 127 | #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 128 | #elif defined(CONFIG_SYS_USE_NOR) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 129 | #ifdef CONFIG_NOR_UART_BOOT |
| 130 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 131 | #else |
| 132 | #undef CONFIG_SKIP_LOWLEVEL_INIT |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 133 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 134 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 135 | #undef CONFIG_SYS_NO_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 136 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_FLASH_CFI |
| 138 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ |
| 139 | #define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */ |
| 140 | #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*2) |
Sandeep Paulraj | 80303ab | 2010-12-29 14:42:56 -0500 | [diff] [blame] | 141 | #define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SZ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 142 | #define PHYS_FLASH_1 0x02000000 /* CS2 Base address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 144 | #define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 145 | #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) |
| 146 | #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 147 | #endif |
| 148 | /*==============================*/ |
| 149 | /* U-Boot general configuration */ |
| 150 | /*==============================*/ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 151 | #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 152 | #define CONFIG_MISC_INIT_R |
| 153 | #undef CONFIG_BOOTDELAY |
| 154 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */ |
| 156 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 157 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ |
| 158 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 159 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| 160 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 161 | #define CONFIG_VERSION_VARIABLE |
| 162 | #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 163 | #define CONFIG_SYS_HUSH_PARSER |
| 164 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 165 | #define CONFIG_CMDLINE_EDITING |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 166 | #define CONFIG_SYS_LONGHELP |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 167 | #define CONFIG_CRC32_VERIFY |
| 168 | #define CONFIG_MX_CYCLIC |
| 169 | /*===================*/ |
| 170 | /* Linux Information */ |
| 171 | /*===================*/ |
| 172 | #define LINUX_BOOT_PARAM_ADDR 0x80000100 |
| 173 | #define CONFIG_CMDLINE_TAG |
| 174 | #define CONFIG_SETUP_MEMORY_TAGS |
| 175 | #define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" |
| 176 | #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000" |
| 177 | /*=================*/ |
| 178 | /* U-Boot commands */ |
| 179 | /*=================*/ |
| 180 | #include <config_cmd_default.h> |
| 181 | #define CONFIG_CMD_ASKENV |
| 182 | #define CONFIG_CMD_DHCP |
| 183 | #define CONFIG_CMD_DIAG |
| 184 | #define CONFIG_CMD_I2C |
| 185 | #define CONFIG_CMD_MII |
| 186 | #define CONFIG_CMD_PING |
| 187 | #define CONFIG_CMD_SAVES |
| 188 | #define CONFIG_CMD_EEPROM |
| 189 | #undef CONFIG_CMD_BDI |
| 190 | #undef CONFIG_CMD_FPGA |
| 191 | #undef CONFIG_CMD_SETGETDCR |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | #ifdef CONFIG_SYS_USE_NAND |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 193 | #undef CONFIG_CMD_FLASH |
| 194 | #undef CONFIG_CMD_IMLS |
| 195 | #define CONFIG_CMD_NAND |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 196 | #elif defined(CONFIG_SYS_USE_NOR) |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 197 | #define CONFIG_CMD_JFFS2 |
| 198 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 199 | #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!" |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 200 | #endif |
Sandeep Paulraj | a12f7c0 | 2010-12-11 20:37:54 -0500 | [diff] [blame] | 201 | |
Hadli, Manjunath | 0dfccbe | 2012-02-06 00:30:44 +0000 | [diff] [blame^] | 202 | #ifdef CONFIG_CMD_BDI |
| 203 | #define CONFIG_CLOCKS |
| 204 | #endif |
| 205 | |
Sandeep Paulraj | a12f7c0 | 2010-12-11 20:37:54 -0500 | [diff] [blame] | 206 | #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ |
| 207 | |
| 208 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 209 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 |
| 210 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
| 211 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 212 | GENERATED_GBL_DATA_SIZE) |
| 213 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 214 | #endif /* __CONFIG_H */ |