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Sedji Gaouaou538566d2009-07-09 10:16:29 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Sedji Gaouaou538566d2009-07-09 10:16:29 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26#include <asm/arch/at91_common.h>
27#include <asm/arch/at91_pmc.h>
28#include <asm/arch/gpio.h>
Thomas Petazzonib0263c52011-08-04 08:53:29 +000029#include <asm/io.h>
30
31/*
32 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
33 * peripheral pins. Good to have if hardware is soldered optionally
34 * or in case of SPI no slave is selected. Avoid lines to float
35 * needlessly. Use a short local PUP define.
36 *
37 * Due to errata "TXD floats when CTS is inactive" pullups are always
38 * on for TXD pins.
39 */
40#ifdef CONFIG_AT91_GPIO_PULLUP
41# define PUP CONFIG_AT91_GPIO_PULLUP
42#else
43# define PUP 0
44#endif
Sedji Gaouaou538566d2009-07-09 10:16:29 +020045
46void at91_serial0_hw_init(void)
47{
Thomas Petazzonib0263c52011-08-04 08:53:29 +000048 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010049
Jens Scharsigb49d15c2010-02-03 22:46:46 +010050 at91_set_a_periph(AT91_PIO_PORTB, 19, 1); /* TXD0 */
Thomas Petazzonib0263c52011-08-04 08:53:29 +000051 at91_set_a_periph(AT91_PIO_PORTB, 18, PUP); /* RXD0 */
52 writel(1 << ATMEL_ID_USART0, &pmc->pcer);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020053}
54
55void at91_serial1_hw_init(void)
56{
Thomas Petazzonib0263c52011-08-04 08:53:29 +000057 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010058
Jens Scharsigb49d15c2010-02-03 22:46:46 +010059 at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD1 */
Thomas Petazzonib0263c52011-08-04 08:53:29 +000060 at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD1 */
61 writel(1 << ATMEL_ID_USART1, &pmc->pcer);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020062}
63
64void at91_serial2_hw_init(void)
65{
Thomas Petazzonib0263c52011-08-04 08:53:29 +000066 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010067
Jens Scharsigb49d15c2010-02-03 22:46:46 +010068 at91_set_a_periph(AT91_PIO_PORTD, 6, 1); /* TXD2 */
Thomas Petazzonib0263c52011-08-04 08:53:29 +000069 at91_set_a_periph(AT91_PIO_PORTD, 7, PUP); /* RXD2 */
70 writel(1 << ATMEL_ID_USART2, &pmc->pcer);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020071}
72
Thomas Petazzonib0263c52011-08-04 08:53:29 +000073void at91_seriald_hw_init(void)
Sedji Gaouaou538566d2009-07-09 10:16:29 +020074{
Thomas Petazzonib0263c52011-08-04 08:53:29 +000075 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010076
Jens Scharsigb49d15c2010-02-03 22:46:46 +010077 at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* DRXD */
78 at91_set_a_periph(AT91_PIO_PORTB, 13, 1); /* DTXD */
Thomas Petazzonib0263c52011-08-04 08:53:29 +000079 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020080}
81
Thomas Petazzonib0263c52011-08-04 08:53:29 +000082#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
Sedji Gaouaou538566d2009-07-09 10:16:29 +020083void at91_spi0_hw_init(unsigned long cs_mask)
84{
Thomas Petazzonib0263c52011-08-04 08:53:29 +000085 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010086
Thomas Petazzonib0263c52011-08-04 08:53:29 +000087 at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI0_MISO */
88 at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI0_MOSI */
89 at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI0_SPCK */
Sedji Gaouaou538566d2009-07-09 10:16:29 +020090
91 /* Enable clock */
Thomas Petazzonib0263c52011-08-04 08:53:29 +000092 writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020093
94 if (cs_mask & (1 << 0)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +000095 at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020096 }
97 if (cs_mask & (1 << 1)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +000098 at91_set_b_periph(AT91_PIO_PORTB, 18, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +020099 }
100 if (cs_mask & (1 << 2)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000101 at91_set_b_periph(AT91_PIO_PORTB, 19, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200102 }
103 if (cs_mask & (1 << 3)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000104 at91_set_b_periph(AT91_PIO_PORTD, 27, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200105 }
106 if (cs_mask & (1 << 4)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000107 at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200108 }
109 if (cs_mask & (1 << 5)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000110 at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200111 }
112 if (cs_mask & (1 << 6)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000113 at91_set_pio_output(AT91_PIO_PORTB, 19, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200114 }
115 if (cs_mask & (1 << 7)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000116 at91_set_pio_output(AT91_PIO_PORTD, 27, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200117 }
118}
119
120void at91_spi1_hw_init(unsigned long cs_mask)
121{
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000122 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +0100123
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000124 at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_MISO */
125 at91_set_a_periph(AT91_PIO_PORTB, 15, PUP); /* SPI1_MOSI */
126 at91_set_a_periph(AT91_PIO_PORTB, 16, PUP); /* SPI1_SPCK */
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200127
128 /* Enable clock */
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000129 writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200130
131 if (cs_mask & (1 << 0)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000132 at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200133 }
134 if (cs_mask & (1 << 1)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000135 at91_set_b_periph(AT91_PIO_PORTD, 28, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200136 }
137 if (cs_mask & (1 << 2)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000138 at91_set_a_periph(AT91_PIO_PORTD, 18, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200139 }
140 if (cs_mask & (1 << 3)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000141 at91_set_a_periph(AT91_PIO_PORTD, 19, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200142 }
143 if (cs_mask & (1 << 4)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000144 at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200145 }
146 if (cs_mask & (1 << 5)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000147 at91_set_pio_output(AT91_PIO_PORTD, 28, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200148 }
149 if (cs_mask & (1 << 6)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000150 at91_set_pio_output(AT91_PIO_PORTD, 18, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200151 }
152 if (cs_mask & (1 << 7)) {
Thomas Petazzonib0263c52011-08-04 08:53:29 +0000153 at91_set_pio_output(AT91_PIO_PORTD, 19, 1);
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200154 }
155
156}
157#endif
158
159#ifdef CONFIG_MACB
160void at91_macb_hw_init(void)
161{
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100162 at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* ETXCK_EREFCK */
163 at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* ERXDV */
164 at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* ERX0 */
165 at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* ERX1 */
166 at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* ERXER */
167 at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* ETXEN */
168 at91_set_a_periph(AT91_PIO_PORTA, 10, 0); /* ETX0 */
169 at91_set_a_periph(AT91_PIO_PORTA, 11, 0); /* ETX1 */
170 at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* EMDIO */
171 at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* EMDC */
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200172#ifndef CONFIG_RMII
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100173 at91_set_b_periph(AT91_PIO_PORTA, 29, 0); /* ECRS */
174 at91_set_b_periph(AT91_PIO_PORTA, 30, 0); /* ECOL */
175 at91_set_b_periph(AT91_PIO_PORTA, 8, 0); /* ERX2 */
176 at91_set_b_periph(AT91_PIO_PORTA, 9, 0); /* ERX3 */
177 at91_set_b_periph(AT91_PIO_PORTA, 28, 0); /* ERXCK */
178 at91_set_b_periph(AT91_PIO_PORTA, 6, 0); /* ETX2 */
179 at91_set_b_periph(AT91_PIO_PORTA, 7, 0); /* ETX3 */
180 at91_set_b_periph(AT91_PIO_PORTA, 27, 0); /* ETXER */
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200181#endif
182}
183#endif