blob: 91afcdd85a84dbdd96bda1c5fd47b471ab58aa4e [file] [log] [blame]
Marek Vasutb700f032019-07-29 19:59:44 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * board/renesas/condor/condor.c
4 * This file is Condor board support.
5 *
6 * Copyright (C) 2019 Marek Vasut <marek.vasut+renesas@gmail.com>
7 */
8
9#include <common.h>
Simon Glassafb02152019-12-28 10:45:01 -070010#include <cpu_func.h>
Simon Glassf11478f2019-12-28 10:45:07 -070011#include <hang.h>
Simon Glass97589732020-05-10 11:40:02 -060012#include <init.h>
Marek Vasutb700f032019-07-29 19:59:44 +020013#include <asm/processor.h>
14#include <asm/mach-types.h>
15#include <asm/io.h>
16#include <linux/errno.h>
17#include <asm/arch/sys_proto.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21void s_init(void)
22{
23}
24
25int board_early_init_f(void)
26{
27 return 0;
28}
29
30int board_init(void)
31{
32 /* adress of boot parameters */
33 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
34
35 return 0;
36}
37
38#define RST_BASE 0xE6160000
39#define RST_CA57RESCNT (RST_BASE + 0x40)
40#define RST_CA53RESCNT (RST_BASE + 0x44)
41#define RST_RSTOUTCR (RST_BASE + 0x58)
42#define RST_CA57_CODE 0xA5A5000F
43#define RST_CA53_CODE 0x5A5A000F
44
45void reset_cpu(ulong addr)
46{
47 unsigned long midr, cputype;
48
49 asm volatile("mrs %0, midr_el1" : "=r" (midr));
50 cputype = (midr >> 4) & 0xfff;
51
52 if (cputype == 0xd03)
53 writel(RST_CA53_CODE, RST_CA53RESCNT);
54 else if (cputype == 0xd07)
55 writel(RST_CA57_CODE, RST_CA57RESCNT);
56 else
57 hang();
58}