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git01.mediatek.com / filogic / uboot / 0db4b94f66612cda8487d9dc1835c7fdc3272633 / . / arch / sh / lib / ashlsi3.S
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Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Phil Edworthy8e5ab4b2011-06-02 22:15:27 +0000[diff] [blame]2/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006
4 Free Software Foundation, Inc.
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 */
Phil Edworthy8e5ab4b2011-06-02 22:15:27 +0000[diff] [blame]6
7!! libgcc routines for the Renesas / SuperH SH CPUs.
8!! Contributed by Steve Chamberlain.
9!! sac@cygnus.com
10
11!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
12!! recoded in assembly by Toshiyasu Morita
13!! tm@netcom.com
14
15/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
16 ELF local label prefixes by J"orn Rennecke
17 amylaar@cygnus.com */
18
19!
20! GLOBAL(ashlsi3)
21!
22! Entry:
23!
24! r4: Value to shift
25! r5: Shifts
26!
27! Exit:
28!
29! r0: Result
30!
31! Destroys:
32!
33! (none)
34!
35 .global __ashlsi3
36 .align 2
37__ashlsi3:
38 mov #31,r0
39 and r0,r5
40 mova __ashlsi3_table,r0
41 mov.b @(r0,r5),r5
42#ifdef __sh1__
43 add r5,r0
44 jmp @r0
45#else
46 braf r5
47#endif
48 mov r4,r0
49
50 .align 2
51__ashlsi3_table:
52 .byte __ashlsi3_0-__ashlsi3_table
53 .byte __ashlsi3_1-__ashlsi3_table
54 .byte __ashlsi3_2-__ashlsi3_table
55 .byte __ashlsi3_3-__ashlsi3_table
56 .byte __ashlsi3_4-__ashlsi3_table
57 .byte __ashlsi3_5-__ashlsi3_table
58 .byte __ashlsi3_6-__ashlsi3_table
59 .byte __ashlsi3_7-__ashlsi3_table
60 .byte __ashlsi3_8-__ashlsi3_table
61 .byte __ashlsi3_9-__ashlsi3_table
62 .byte __ashlsi3_10-__ashlsi3_table
63 .byte __ashlsi3_11-__ashlsi3_table
64 .byte __ashlsi3_12-__ashlsi3_table
65 .byte __ashlsi3_13-__ashlsi3_table
66 .byte __ashlsi3_14-__ashlsi3_table
67 .byte __ashlsi3_15-__ashlsi3_table
68 .byte __ashlsi3_16-__ashlsi3_table
69 .byte __ashlsi3_17-__ashlsi3_table
70 .byte __ashlsi3_18-__ashlsi3_table
71 .byte __ashlsi3_19-__ashlsi3_table
72 .byte __ashlsi3_20-__ashlsi3_table
73 .byte __ashlsi3_21-__ashlsi3_table
74 .byte __ashlsi3_22-__ashlsi3_table
75 .byte __ashlsi3_23-__ashlsi3_table
76 .byte __ashlsi3_24-__ashlsi3_table
77 .byte __ashlsi3_25-__ashlsi3_table
78 .byte __ashlsi3_26-__ashlsi3_table
79 .byte __ashlsi3_27-__ashlsi3_table
80 .byte __ashlsi3_28-__ashlsi3_table
81 .byte __ashlsi3_29-__ashlsi3_table
82 .byte __ashlsi3_30-__ashlsi3_table
83 .byte __ashlsi3_31-__ashlsi3_table
84
85__ashlsi3_6:
86 shll2 r0
87__ashlsi3_4:
88 shll2 r0
89__ashlsi3_2:
90 rts
91 shll2 r0
92
93__ashlsi3_7:
94 shll2 r0
95__ashlsi3_5:
96 shll2 r0
97__ashlsi3_3:
98 shll2 r0
99__ashlsi3_1:
100 rts
101 shll r0
102
103__ashlsi3_14:
104 shll2 r0
105__ashlsi3_12:
106 shll2 r0
107__ashlsi3_10:
108 shll2 r0
109__ashlsi3_8:
110 rts
111 shll8 r0
112
113__ashlsi3_15:
114 shll2 r0
115__ashlsi3_13:
116 shll2 r0
117__ashlsi3_11:
118 shll2 r0
119__ashlsi3_9:
120 shll8 r0
121 rts
122 shll r0
123
124__ashlsi3_22:
125 shll2 r0
126__ashlsi3_20:
127 shll2 r0
128__ashlsi3_18:
129 shll2 r0
130__ashlsi3_16:
131 rts
132 shll16 r0
133
134__ashlsi3_23:
135 shll2 r0
136__ashlsi3_21:
137 shll2 r0
138__ashlsi3_19:
139 shll2 r0
140__ashlsi3_17:
141 shll16 r0
142 rts
143 shll r0
144
145__ashlsi3_30:
146 shll2 r0
147__ashlsi3_28:
148 shll2 r0
149__ashlsi3_26:
150 shll2 r0
151__ashlsi3_24:
152 shll16 r0
153 rts
154 shll8 r0
155
156__ashlsi3_31:
157 shll2 r0
158__ashlsi3_29:
159 shll2 r0
160__ashlsi3_27:
161 shll2 r0
162__ashlsi3_25:
163 shll16 r0
164 shll8 r0
165 rts
166 shll r0
167
168__ashlsi3_0:
169 rts
170 nop