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git01.mediatek.com / filogic / uboot / 0d1b83e553548c06df1e3ae76e6ea70681e0d347 / . / arch / arm / dts / imx8mm-verdin-dahlia.dtsi
blob: c2a5c2f7b204b9f41f193375201b996b38e5c1c1 [file] [log] [blame]
Marcel Ziswiler2712c782022-07-21 15:41:23 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright 2022 Toradex
4 */
5
6/ {
7 sound_card: sound-card {
8 compatible = "simple-audio-card";
9 simple-audio-card,bitclock-master = <&dailink_master>;
10 simple-audio-card,format = "i2s";
11 simple-audio-card,frame-master = <&dailink_master>;
12 simple-audio-card,name = "imx8mm-wm8904";
13 simple-audio-card,routing =
14 "Headphone Jack", "HPOUTL",
15 "Headphone Jack", "HPOUTR",
16 "IN2L", "Line In Jack",
17 "IN2R", "Line In Jack",
18 "Headphone Jack", "MICBIAS",
19 "IN1L", "Headphone Jack";
20 simple-audio-card,widgets =
21 "Microphone", "Headphone Jack",
22 "Headphone", "Headphone Jack",
23 "Line", "Line In Jack";
24
25 dailink_master: simple-audio-card,codec {
26 clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
27 sound-dai = <&wm8904_1a>;
28 };
29
30 simple-audio-card,cpu {
31 sound-dai = <&sai2>;
32 };
33 };
34};
35
36/* Verdin SPI_1 */
37&ecspi2 {
38 status = "okay";
39};
40
41/* EEPROM on display adapter boards */
42&eeprom_display_adapter {
43 status = "okay";
44};
45
46/* EEPROM on Verdin Development board */
47&eeprom_carrier_board {
48 status = "okay";
49};
50
51&fec1 {
52 status = "okay";
53};
54
55/* Verdin QSPI_1 */
56&flexspi {
57 status = "okay";
58};
59
60/* Current measurement into module VCC */
61&hwmon {
62 status = "okay";
63};
64
65&hwmon_temp {
66 vs-supply = <&reg_1p8v>;
67 status = "okay";
68};
69
70&i2c3 {
71 status = "okay";
72};
73
74/* Verdin I2C_1 */
75&i2c4 {
76 status = "okay";
77
78 /* Audio Codec */
79 wm8904_1a: audio-codec@1a {
80 compatible = "wlf,wm8904";
81 AVDD-supply = <&reg_3p3v>;
82 clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
83 clock-names = "mclk";
84 CPVDD-supply = <&reg_3p3v>;
85 DBVDD-supply = <&reg_3p3v>;
86 DCVDD-supply = <&reg_3p3v>;
87 MICVDD-supply = <&reg_3p3v>;
88 reg = <0x1a>;
89 #sound-dai-cells = <0>;
90 };
91};
92
93/* Verdin PCIE_1 */
94&pcie0 {
95 status = "okay";
96};
97
98&pcie_phy {
99 status = "okay";
100};
101
102/* Verdin PWM_3_DSI */
103&pwm1 {
104 status = "okay";
105};
106
107/* Verdin PWM_1 */
108&pwm2 {
109 status = "okay";
110};
111
112/* Verdin PWM_2 */
113&pwm3 {
114 status = "okay";
115};
116
117/* Verdin I2S_1 */
118&sai2 {
119 status = "okay";
120};
121
122/* Verdin UART_3 */
123&uart1 {
124 status = "okay";
125};
126
127/* Verdin UART_1 */
128&uart2 {
129 status = "okay";
130};
131
132/* Verdin UART_2 */
133&uart3 {
134 status = "okay";
135};
136
137/* Verdin USB_1 */
138&usbotg1 {
139 status = "okay";
140};
141
142/* Verdin USB_2 */
143&usbotg2 {
144 status = "okay";
145};
146
147/* Verdin SD_1 */
148&usdhc2 {
149 status = "okay";
150};