| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 2 | /* |
| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 3 | * Copyright (c) Siemens AG, 2021-2023 |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 4 | * |
| 5 | * Authors: |
| 6 | * Chao Zeng <chao.zeng@siemens.com> |
| 7 | * Jan Kiszka <jan.kiszka@siemens.com> |
| 8 | * |
| 9 | * Common bits of the IOT2050 Basic and Advanced variants, PG2 |
| 10 | */ |
| 11 | |
| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 12 | &mcu_r5fss0 { |
| 13 | /* lock-step mode not supported on PG2 boards */ |
| 14 | ti,cluster-mode = <0>; |
| 15 | }; |
| 16 | |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 17 | &main_pmx0 { |
| 18 | cp2102n_reset_pin_default: cp2102n-reset-default-pins { |
| 19 | pinctrl-single,pins = < |
| 20 | /* (AF12) GPIO1_24, used as cp2102 reset */ |
| 21 | AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7) |
| 22 | >; |
| 23 | }; |
| 24 | }; |
| 25 | |
| 26 | &main_gpio1 { |
| 27 | pinctrl-names = "default"; |
| Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 28 | pinctrl-0 = |
| 29 | <&main_pcie_enable_pins_default>, |
| 30 | <&cp2102n_reset_pin_default>; |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 31 | gpio-line-names = |
| 32 | "", "", "", "", "", "", "", "", "", "", |
| 33 | "", "", "", "", "", "", "", "", "", "", |
| 34 | "", "", "", "", "CP2102N-RESET"; |
| 35 | }; |
| 36 | |
| 37 | &dss { |
| 38 | /* Workaround needed to get DP clock of 154Mhz */ |
| 39 | assigned-clocks = <&k3_clks 67 0>; |
| 40 | }; |