Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /dts-v1/; |
| 3 | |
| 4 | #include <dt-bindings/input/input.h> |
| 5 | #include "tegra20.dtsi" |
| 6 | #include "tegra20-cpu-opp.dtsi" |
| 7 | |
| 8 | / { |
| 9 | model = "Compulab TrimSlice board"; |
| 10 | compatible = "compulab,trimslice", "nvidia,tegra20"; |
| 11 | |
| 12 | aliases { |
| 13 | rtc0 = "/i2c@7000c500/rtc@56"; |
| 14 | rtc1 = "/rtc@7000e000"; |
| 15 | serial0 = &uarta; |
| 16 | }; |
| 17 | |
| 18 | chosen { |
| 19 | stdout-path = "serial0:115200n8"; |
| 20 | }; |
| 21 | |
| 22 | memory@0 { |
| 23 | reg = <0x00000000 0x40000000>; |
| 24 | }; |
| 25 | |
| 26 | host1x@50000000 { |
| 27 | hdmi@54280000 { |
| 28 | status = "okay"; |
| 29 | |
| 30 | vdd-supply = <&hdmi_vdd_reg>; |
| 31 | pll-supply = <&hdmi_pll_reg>; |
| 32 | |
| 33 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
| 34 | nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
| 35 | GPIO_ACTIVE_HIGH>; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | pinmux@70000014 { |
| 40 | pinctrl-names = "default"; |
| 41 | pinctrl-0 = <&state_default>; |
| 42 | |
| 43 | state_default: pinmux { |
| 44 | ata { |
| 45 | nvidia,pins = "ata"; |
| 46 | nvidia,function = "ide"; |
| 47 | }; |
| 48 | atb { |
| 49 | nvidia,pins = "atb", "gma"; |
| 50 | nvidia,function = "sdio4"; |
| 51 | }; |
| 52 | atc { |
| 53 | nvidia,pins = "atc", "gmb"; |
| 54 | nvidia,function = "nand"; |
| 55 | }; |
| 56 | atd { |
| 57 | nvidia,pins = "atd", "ate", "gme", "pta"; |
| 58 | nvidia,function = "gmi"; |
| 59 | }; |
| 60 | cdev1 { |
| 61 | nvidia,pins = "cdev1"; |
| 62 | nvidia,function = "plla_out"; |
| 63 | }; |
| 64 | cdev2 { |
| 65 | nvidia,pins = "cdev2"; |
| 66 | nvidia,function = "pllp_out4"; |
| 67 | }; |
| 68 | crtp { |
| 69 | nvidia,pins = "crtp"; |
| 70 | nvidia,function = "crt"; |
| 71 | }; |
| 72 | csus { |
| 73 | nvidia,pins = "csus"; |
| 74 | nvidia,function = "vi_sensor_clk"; |
| 75 | }; |
| 76 | dap1 { |
| 77 | nvidia,pins = "dap1"; |
| 78 | nvidia,function = "dap1"; |
| 79 | }; |
| 80 | dap2 { |
| 81 | nvidia,pins = "dap2"; |
| 82 | nvidia,function = "dap2"; |
| 83 | }; |
| 84 | dap3 { |
| 85 | nvidia,pins = "dap3"; |
| 86 | nvidia,function = "dap3"; |
| 87 | }; |
| 88 | dap4 { |
| 89 | nvidia,pins = "dap4"; |
| 90 | nvidia,function = "dap4"; |
| 91 | }; |
| 92 | ddc { |
| 93 | nvidia,pins = "ddc"; |
| 94 | nvidia,function = "i2c2"; |
| 95 | }; |
| 96 | dta { |
| 97 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
| 98 | nvidia,function = "vi"; |
| 99 | }; |
| 100 | dtf { |
| 101 | nvidia,pins = "dtf"; |
| 102 | nvidia,function = "i2c3"; |
| 103 | }; |
| 104 | gmc { |
| 105 | nvidia,pins = "gmc", "gmd"; |
| 106 | nvidia,function = "sflash"; |
| 107 | }; |
| 108 | gpu { |
| 109 | nvidia,pins = "gpu"; |
| 110 | nvidia,function = "uarta"; |
| 111 | }; |
| 112 | gpu7 { |
| 113 | nvidia,pins = "gpu7"; |
| 114 | nvidia,function = "rtck"; |
| 115 | }; |
| 116 | gpv { |
| 117 | nvidia,pins = "gpv", "slxa", "slxk"; |
| 118 | nvidia,function = "pcie"; |
| 119 | }; |
| 120 | hdint { |
| 121 | nvidia,pins = "hdint"; |
| 122 | nvidia,function = "hdmi"; |
| 123 | }; |
| 124 | i2cp { |
| 125 | nvidia,pins = "i2cp"; |
| 126 | nvidia,function = "i2cp"; |
| 127 | }; |
| 128 | irrx { |
| 129 | nvidia,pins = "irrx", "irtx"; |
| 130 | nvidia,function = "uartb"; |
| 131 | }; |
| 132 | kbca { |
| 133 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| 134 | "kbce", "kbcf"; |
| 135 | nvidia,function = "kbc"; |
| 136 | }; |
| 137 | lcsn { |
| 138 | nvidia,pins = "lcsn", "ld0", "ld1", "ld2", |
| 139 | "ld3", "ld4", "ld5", "ld6", "ld7", |
| 140 | "ld8", "ld9", "ld10", "ld11", "ld12", |
| 141 | "ld13", "ld14", "ld15", "ld16", "ld17", |
| 142 | "ldc", "ldi", "lhp0", "lhp1", "lhp2", |
| 143 | "lhs", "lm0", "lm1", "lpp", "lpw0", |
| 144 | "lpw1", "lpw2", "lsc0", "lsc1", "lsck", |
| 145 | "lsda", "lsdi", "lspi", "lvp0", "lvp1", |
| 146 | "lvs"; |
| 147 | nvidia,function = "displaya"; |
| 148 | }; |
| 149 | owc { |
| 150 | nvidia,pins = "owc", "uac"; |
| 151 | nvidia,function = "rsvd2"; |
| 152 | }; |
| 153 | pmc { |
| 154 | nvidia,pins = "pmc"; |
| 155 | nvidia,function = "pwr_on"; |
| 156 | }; |
| 157 | rm { |
| 158 | nvidia,pins = "rm"; |
| 159 | nvidia,function = "i2c1"; |
| 160 | }; |
| 161 | sdb { |
| 162 | nvidia,pins = "sdb", "sdc", "sdd"; |
| 163 | nvidia,function = "pwm"; |
| 164 | }; |
| 165 | sdio1 { |
| 166 | nvidia,pins = "sdio1"; |
| 167 | nvidia,function = "sdio1"; |
| 168 | }; |
| 169 | slxc { |
| 170 | nvidia,pins = "slxc", "slxd"; |
| 171 | nvidia,function = "sdio3"; |
| 172 | }; |
| 173 | spdi { |
| 174 | nvidia,pins = "spdi", "spdo"; |
| 175 | nvidia,function = "spdif"; |
| 176 | }; |
| 177 | spia { |
| 178 | nvidia,pins = "spia", "spib", "spic"; |
| 179 | nvidia,function = "spi2"; |
| 180 | }; |
| 181 | spid { |
| 182 | nvidia,pins = "spid", "spie", "spif"; |
| 183 | nvidia,function = "spi1"; |
| 184 | }; |
| 185 | spig { |
| 186 | nvidia,pins = "spig", "spih"; |
| 187 | nvidia,function = "spi2_alt"; |
| 188 | }; |
| 189 | uaa { |
| 190 | nvidia,pins = "uaa", "uab", "uda"; |
| 191 | nvidia,function = "ulpi"; |
| 192 | }; |
| 193 | uad { |
| 194 | nvidia,pins = "uad"; |
| 195 | nvidia,function = "irda"; |
| 196 | }; |
| 197 | uca { |
| 198 | nvidia,pins = "uca", "ucb"; |
| 199 | nvidia,function = "uartc"; |
| 200 | }; |
| 201 | conf_ata { |
| 202 | nvidia,pins = "ata", "atc", "atd", "ate", |
| 203 | "crtp", "dap2", "dap3", "dap4", "dta", |
| 204 | "dtb", "dtc", "dtd", "dte", "gmb", |
| 205 | "gme", "i2cp", "pta", "slxc", "slxd", |
| 206 | "spdi", "spdo", "uda"; |
| 207 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 208 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 209 | }; |
| 210 | conf_atb { |
| 211 | nvidia,pins = "atb", "cdev1", "cdev2", "dap1", |
| 212 | "gma", "gmc", "gmd", "gpu", "gpu7", |
| 213 | "gpv", "sdio1", "slxa", "slxk", "uac"; |
| 214 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 215 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 216 | }; |
| 217 | conf_ck32 { |
| 218 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| 219 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
| 220 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 221 | }; |
| 222 | conf_csus { |
| 223 | nvidia,pins = "csus", "spia", "spib", |
| 224 | "spid", "spif"; |
| 225 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 226 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 227 | }; |
| 228 | conf_ddc { |
| 229 | nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd"; |
| 230 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 231 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 232 | }; |
| 233 | conf_hdint { |
| 234 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", |
| 235 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", |
| 236 | "lvp0", "pmc"; |
| 237 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 238 | }; |
| 239 | conf_irrx { |
| 240 | nvidia,pins = "irrx", "irtx", "kbca", "kbcb", |
| 241 | "kbcc", "kbcd", "kbce", "kbcf", "owc", |
| 242 | "spic", "spie", "spig", "spih", "uaa", |
| 243 | "uab", "uad", "uca", "ucb"; |
| 244 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 245 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 246 | }; |
| 247 | conf_lc { |
| 248 | nvidia,pins = "lc", "ls"; |
| 249 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 250 | }; |
| 251 | conf_ld0 { |
| 252 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 253 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 254 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 255 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 256 | "lhp1", "lhp2", "lhs", "lm0", "lpp", |
| 257 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", |
| 258 | "lvs", "sdb"; |
| 259 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 260 | }; |
| 261 | conf_ld17_0 { |
| 262 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| 263 | "ld23_22"; |
| 264 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 265 | }; |
| 266 | conf_spif { |
| 267 | nvidia,pins = "spif"; |
| 268 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 269 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 270 | }; |
| 271 | }; |
| 272 | }; |
| 273 | |
| 274 | i2s@70002800 { |
| 275 | status = "okay"; |
| 276 | }; |
| 277 | |
| 278 | serial@70006000 { |
| 279 | /delete-property/ dmas; |
| 280 | /delete-property/ dma-names; |
| 281 | status = "okay"; |
| 282 | }; |
| 283 | |
| 284 | dvi_ddc: i2c@7000c000 { |
| 285 | status = "okay"; |
| 286 | clock-frequency = <100000>; |
| 287 | }; |
| 288 | |
| 289 | spi@7000c380 { |
| 290 | status = "okay"; |
| 291 | spi-max-frequency = <48000000>; |
| 292 | |
| 293 | flash@0 { |
| 294 | compatible = "winbond,w25q80bl", "jedec,spi-nor"; |
| 295 | reg = <0>; |
| 296 | spi-max-frequency = <48000000>; |
| 297 | }; |
| 298 | }; |
| 299 | |
| 300 | hdmi_ddc: i2c@7000c400 { |
| 301 | status = "okay"; |
| 302 | clock-frequency = <100000>; |
| 303 | }; |
| 304 | |
| 305 | i2c@7000c500 { |
| 306 | status = "okay"; |
| 307 | clock-frequency = <400000>; |
| 308 | |
| 309 | codec: codec@1a { |
| 310 | compatible = "ti,tlv320aic23"; |
| 311 | reg = <0x1a>; |
| 312 | }; |
| 313 | |
| 314 | rtc@56 { |
| 315 | compatible = "emmicro,em3027"; |
| 316 | reg = <0x56>; |
| 317 | }; |
| 318 | }; |
| 319 | |
| 320 | pmc@7000e400 { |
| 321 | nvidia,suspend-mode = <1>; |
| 322 | nvidia,cpu-pwr-good-time = <5000>; |
| 323 | nvidia,cpu-pwr-off-time = <5000>; |
| 324 | nvidia,core-pwr-good-time = <3845 3845>; |
| 325 | nvidia,core-pwr-off-time = <3875>; |
| 326 | nvidia,sys-clock-req-active-high; |
| 327 | core-supply = <&vdd_core>; |
| 328 | }; |
| 329 | |
| 330 | pcie@80003000 { |
| 331 | status = "okay"; |
| 332 | |
| 333 | avdd-pex-supply = <&pci_vdd_reg>; |
| 334 | vdd-pex-supply = <&pci_vdd_reg>; |
| 335 | avdd-pex-pll-supply = <&pci_vdd_reg>; |
| 336 | avdd-plle-supply = <&pci_vdd_reg>; |
| 337 | vddio-pex-clk-supply = <&pci_clk_reg>; |
| 338 | |
| 339 | pci@1,0 { |
| 340 | status = "okay"; |
| 341 | }; |
| 342 | }; |
| 343 | |
| 344 | usb@c5000000 { |
| 345 | status = "okay"; |
| 346 | }; |
| 347 | |
| 348 | usb-phy@c5000000 { |
| 349 | status = "okay"; |
| 350 | vbus-supply = <&vbus_reg>; |
| 351 | }; |
| 352 | |
| 353 | usb@c5004000 { |
| 354 | status = "okay"; |
| 355 | }; |
| 356 | |
| 357 | usb-phy@c5004000 { |
| 358 | status = "okay"; |
| 359 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) |
| 360 | GPIO_ACTIVE_LOW>; |
| 361 | }; |
| 362 | |
| 363 | usb@c5008000 { |
| 364 | status = "okay"; |
| 365 | }; |
| 366 | |
| 367 | usb-phy@c5008000 { |
| 368 | status = "okay"; |
| 369 | }; |
| 370 | |
| 371 | mmc@c8000000 { |
| 372 | status = "okay"; |
| 373 | broken-cd; |
| 374 | bus-width = <4>; |
| 375 | }; |
| 376 | |
| 377 | mmc@c8000600 { |
| 378 | status = "okay"; |
| 379 | cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>; |
| 380 | wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; |
| 381 | bus-width = <4>; |
| 382 | }; |
| 383 | |
| 384 | clk32k_in: clock-32k { |
| 385 | compatible = "fixed-clock"; |
| 386 | clock-frequency = <32768>; |
| 387 | #clock-cells = <0>; |
| 388 | }; |
| 389 | |
| 390 | cpus { |
| 391 | cpu0: cpu@0 { |
| 392 | operating-points-v2 = <&cpu0_opp_table>; |
| 393 | }; |
| 394 | |
| 395 | cpu@1 { |
| 396 | operating-points-v2 = <&cpu0_opp_table>; |
| 397 | }; |
| 398 | }; |
| 399 | |
| 400 | gpio-keys { |
| 401 | compatible = "gpio-keys"; |
| 402 | |
| 403 | key-power { |
| 404 | label = "Power"; |
| 405 | gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; |
| 406 | linux,code = <KEY_POWER>; |
| 407 | wakeup-source; |
| 408 | }; |
| 409 | }; |
| 410 | |
| 411 | poweroff { |
| 412 | compatible = "gpio-poweroff"; |
| 413 | gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; |
| 414 | }; |
| 415 | |
| 416 | hdmi_vdd_reg: regulator-hdmi { |
| 417 | compatible = "regulator-fixed"; |
| 418 | regulator-name = "avdd_hdmi"; |
| 419 | regulator-min-microvolt = <3300000>; |
| 420 | regulator-max-microvolt = <3300000>; |
| 421 | regulator-always-on; |
| 422 | }; |
| 423 | |
| 424 | hdmi_pll_reg: regulator-hdmipll { |
| 425 | compatible = "regulator-fixed"; |
| 426 | regulator-name = "avdd_hdmi_pll"; |
| 427 | regulator-min-microvolt = <1800000>; |
| 428 | regulator-max-microvolt = <1800000>; |
| 429 | regulator-always-on; |
| 430 | }; |
| 431 | |
| 432 | vbus_reg: regulator-vbus { |
| 433 | compatible = "regulator-fixed"; |
| 434 | regulator-name = "usb1_vbus"; |
| 435 | regulator-min-microvolt = <5000000>; |
| 436 | regulator-max-microvolt = <5000000>; |
| 437 | enable-active-high; |
| 438 | gpio = <&gpio TEGRA_GPIO(V, 2) 0>; |
| 439 | regulator-always-on; |
| 440 | regulator-boot-on; |
| 441 | }; |
| 442 | |
| 443 | pci_clk_reg: regulator-pciclk { |
| 444 | compatible = "regulator-fixed"; |
| 445 | regulator-name = "pci_clk"; |
| 446 | regulator-min-microvolt = <3300000>; |
| 447 | regulator-max-microvolt = <3300000>; |
| 448 | regulator-always-on; |
| 449 | }; |
| 450 | |
| 451 | pci_vdd_reg: regulator-pcivdd { |
| 452 | compatible = "regulator-fixed"; |
| 453 | regulator-name = "pci_vdd"; |
| 454 | regulator-min-microvolt = <1050000>; |
| 455 | regulator-max-microvolt = <1050000>; |
| 456 | regulator-always-on; |
| 457 | }; |
| 458 | |
| 459 | vdd_core: regulator-core { |
| 460 | compatible = "regulator-fixed"; |
| 461 | regulator-name = "vdd_core"; |
| 462 | regulator-min-microvolt = <1300000>; |
| 463 | regulator-max-microvolt = <1300000>; |
| 464 | regulator-always-on; |
| 465 | }; |
| 466 | |
| 467 | sound { |
| 468 | compatible = "nvidia,tegra-audio-trimslice"; |
| 469 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 470 | nvidia,audio-codec = <&codec>; |
| 471 | |
| 472 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
| 473 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, |
| 474 | <&tegra_car TEGRA20_CLK_CDEV1>; |
| 475 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
| 476 | }; |
| 477 | }; |