blob: c684c994b618d03f518f7bc7284b957b3317ecd6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass623d28f2016-01-18 19:52:15 -07002/*
3 * Copyright (c) 2015 Google, Inc
Simon Glass623d28f2016-01-18 19:52:15 -07004 */
5
Patrick Delaunay81313352021-04-27 11:02:19 +02006#define LOG_CATEGORY UCLASS_VIDEO
7
Nikhil M Jainf7ec5312023-07-18 14:27:31 +05308#include <bloblist.h>
Simon Glass73c9c372020-07-02 21:12:20 -06009#include <console.h>
Simon Glass63334482019-11-14 12:57:39 -070010#include <cpu_func.h>
Simon Glasse0337a52024-07-31 08:44:10 -060011#include <cyclic.h>
Simon Glass623d28f2016-01-18 19:52:15 -070012#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070014#include <malloc.h>
Simon Glass623d28f2016-01-18 19:52:15 -070015#include <mapmem.h>
Nikhil M Jainf7ec5312023-07-18 14:27:31 +053016#include <spl.h>
Simon Glass623d28f2016-01-18 19:52:15 -070017#include <stdio_dev.h>
18#include <video.h>
19#include <video_console.h>
Simon Glass274e0b02020-05-10 11:39:56 -060020#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060021#include <asm/global_data.h>
Simon Glass623d28f2016-01-18 19:52:15 -070022#include <dm/lists.h>
Michal Simek632e3d42020-12-14 08:47:52 +010023#include <dm/device_compat.h>
Simon Glass623d28f2016-01-18 19:52:15 -070024#include <dm/device-internal.h>
25#include <dm/uclass-internal.h>
26#ifdef CONFIG_SANDBOX
27#include <asm/sdl.h>
28#endif
29
30/*
31 * Theory of operation:
32 *
33 * Before relocation each device is bound. The driver for each device must
Simon Glassb75b15b2020-12-03 16:55:23 -070034 * set the @align and @size values in struct video_uc_plat. This
Simon Glass623d28f2016-01-18 19:52:15 -070035 * information represents the requires size and alignment of the frame buffer
36 * for the device. The values can be an over-estimate but cannot be too
37 * small. The actual values will be suppled (in the same manner) by the bind()
Pali Rohárf204fce2022-03-09 20:46:00 +010038 * method after relocation. Additionally driver can allocate frame buffer
39 * itself by setting plat->base.
Simon Glass623d28f2016-01-18 19:52:15 -070040 *
41 * This information is then picked up by video_reserve() which works out how
42 * much memory is needed for all devices. This is allocated between
43 * gd->video_bottom and gd->video_top.
44 *
45 * After relocation the same process occurs. The driver supplies the same
46 * @size and @align information and this time video_post_bind() checks that
47 * the drivers does not overflow the allocated memory.
48 *
49 * The frame buffer address is actually set (to plat->base) in
50 * video_post_probe(). This function also clears the frame buffer and
51 * allocates a suitable text console device. This can then be used to write
52 * text to the video device.
53 */
54DECLARE_GLOBAL_DATA_PTR;
55
Simon Glasse0337a52024-07-31 08:44:10 -060056struct cyclic_info;
57
Simon Glass951255d2020-07-02 21:12:32 -060058/**
59 * struct video_uc_priv - Information for the video uclass
60 *
61 * @video_ptr: Current allocation position of the video framebuffer pointer.
62 * While binding devices after relocation, this points to the next
63 * available address to use for a device's framebuffer. It starts at
64 * gd->video_top and works downwards, running out of space when it hits
65 * gd->video_bottom.
Simon Glasse0337a52024-07-31 08:44:10 -060066 * @cyc: handle for cyclic-execution function, or NULL if none
Simon Glass951255d2020-07-02 21:12:32 -060067 */
68struct video_uc_priv {
69 ulong video_ptr;
Simon Glasse0337a52024-07-31 08:44:10 -060070 bool cyc_active;
71 struct cyclic_info cyc;
Simon Glass951255d2020-07-02 21:12:32 -060072};
73
Simon Glass2a006332022-10-06 08:36:03 -060074/** struct vid_rgb - Describes a video colour */
75struct vid_rgb {
76 u32 r;
77 u32 g;
78 u32 b;
79};
80
Simon Glass64635382016-01-21 19:44:52 -070081void video_set_flush_dcache(struct udevice *dev, bool flush)
82{
83 struct video_priv *priv = dev_get_uclass_priv(dev);
84
85 priv->flush_dcache = flush;
86}
87
Simon Glassdf865d32023-03-10 12:47:17 -080088static ulong alloc_fb_(ulong align, ulong size, ulong *addrp)
89{
90 ulong base;
91
92 align = align ? align : 1 << 20;
93 base = *addrp - size;
94 base &= ~(align - 1);
95 size = *addrp - base;
96 *addrp = base;
97
98 return size;
99}
100
Simon Glass623d28f2016-01-18 19:52:15 -0700101static ulong alloc_fb(struct udevice *dev, ulong *addrp)
102{
Simon Glassb75b15b2020-12-03 16:55:23 -0700103 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
Simon Glassdf865d32023-03-10 12:47:17 -0800104 ulong size;
Simon Glass623d28f2016-01-18 19:52:15 -0700105
Simon Glassdf865d32023-03-10 12:47:17 -0800106 if (!plat->size) {
107 if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->copy_size) {
108 size = alloc_fb_(plat->align, plat->copy_size, addrp);
109 plat->copy_base = *addrp;
110 return size;
111 }
112
Bin Meng755623d2016-10-09 04:14:17 -0700113 return 0;
Simon Glassdf865d32023-03-10 12:47:17 -0800114 }
Bin Meng755623d2016-10-09 04:14:17 -0700115
Pali Rohárf204fce2022-03-09 20:46:00 +0100116 /* Allow drivers to allocate the frame buffer themselves */
117 if (plat->base)
118 return 0;
119
Simon Glassdf865d32023-03-10 12:47:17 -0800120 size = alloc_fb_(plat->align, plat->size, addrp);
121 plat->base = *addrp;
Simon Glass623d28f2016-01-18 19:52:15 -0700122
123 return size;
124}
125
126int video_reserve(ulong *addrp)
127{
128 struct udevice *dev;
129 ulong size;
130
Simon Glassd4dce4a2024-09-29 19:49:36 -0600131 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && xpl_phase() == PHASE_BOARD_F)
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530132 return 0;
133
Simon Glass623d28f2016-01-18 19:52:15 -0700134 gd->video_top = *addrp;
135 for (uclass_find_first_device(UCLASS_VIDEO, &dev);
136 dev;
137 uclass_find_next_device(&dev)) {
138 size = alloc_fb(dev, addrp);
139 debug("%s: Reserving %lx bytes at %lx for video device '%s'\n",
140 __func__, size, *addrp, dev->name);
141 }
Simon Glassc3d2f352020-07-02 21:12:33 -0600142
143 /* Allocate space for PCI video devices in case there were not bound */
144 if (*addrp == gd->video_top)
Nikhil M Jain9e3301d2023-04-20 17:41:08 +0530145 *addrp -= CONFIG_VAL(VIDEO_PCI_DEFAULT_FB_SIZE);
Simon Glassc3d2f352020-07-02 21:12:33 -0600146
Simon Glass623d28f2016-01-18 19:52:15 -0700147 gd->video_bottom = *addrp;
148 debug("Video frame buffers from %lx to %lx\n", gd->video_bottom,
149 gd->video_top);
150
151 return 0;
152}
153
Simon Glass853e8d22024-08-21 10:18:55 -0600154ulong video_get_fb(void)
155{
156 struct udevice *dev;
157
158 uclass_find_first_device(UCLASS_VIDEO, &dev);
159 if (dev) {
160 const struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
161
162 return uc_plat->base;
163 }
164
165 return 0;
166}
167
Simon Glass062673b2023-06-01 10:22:33 -0600168int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
169 int yend, u32 colour)
170{
171 struct video_priv *priv = dev_get_uclass_priv(dev);
172 void *start, *line;
173 int pixels = xend - xstart;
174 int row, i, ret;
175
176 start = priv->fb + ystart * priv->line_length;
177 start += xstart * VNBYTES(priv->bpix);
178 line = start;
179 for (row = ystart; row < yend; row++) {
180 switch (priv->bpix) {
181 case VIDEO_BPP8: {
182 u8 *dst = line;
183
184 if (IS_ENABLED(CONFIG_VIDEO_BPP8)) {
185 for (i = 0; i < pixels; i++)
186 *dst++ = colour;
187 }
188 break;
189 }
190 case VIDEO_BPP16: {
191 u16 *dst = line;
192
193 if (IS_ENABLED(CONFIG_VIDEO_BPP16)) {
194 for (i = 0; i < pixels; i++)
195 *dst++ = colour;
196 }
197 break;
198 }
199 case VIDEO_BPP32: {
200 u32 *dst = line;
201
202 if (IS_ENABLED(CONFIG_VIDEO_BPP32)) {
203 for (i = 0; i < pixels; i++)
204 *dst++ = colour;
205 }
206 break;
207 }
208 default:
209 return -ENOSYS;
210 }
211 line += priv->line_length;
212 }
213 ret = video_sync_copy(dev, start, line);
214 if (ret)
215 return ret;
216
217 return 0;
218}
219
Nikhil M Jain76833532023-07-18 14:27:30 +0530220int video_reserve_from_bloblist(struct video_handoff *ho)
221{
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530222 if (!ho->fb || ho->size == 0)
223 return -ENOENT;
224
Nikhil M Jain76833532023-07-18 14:27:30 +0530225 gd->video_bottom = ho->fb;
Nikhil M Jain76833532023-07-18 14:27:30 +0530226 gd->video_top = ho->fb + ho->size;
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530227 debug("%s: Reserving %lx bytes at %08x as per bloblist received\n",
228 __func__, (unsigned long)ho->size, (u32)ho->fb);
Nikhil M Jain76833532023-07-18 14:27:30 +0530229
230 return 0;
231}
232
Simon Glass2baa6f82022-10-06 08:36:08 -0600233int video_fill(struct udevice *dev, u32 colour)
Simon Glass623d28f2016-01-18 19:52:15 -0700234{
235 struct video_priv *priv = dev_get_uclass_priv(dev);
Simon Glassf8ec6212020-07-02 21:12:22 -0600236 int ret;
Simon Glass623d28f2016-01-18 19:52:15 -0700237
Heinrich Schuchardt5e4947e2018-02-08 21:47:10 +0100238 switch (priv->bpix) {
Simon Glass05c17d62019-12-20 18:10:37 -0700239 case VIDEO_BPP16:
Nikhil M Jain9e3301d2023-04-20 17:41:08 +0530240 if (CONFIG_IS_ENABLED(VIDEO_BPP16)) {
Simon Glass05c17d62019-12-20 18:10:37 -0700241 u16 *ppix = priv->fb;
242 u16 *end = priv->fb + priv->fb_size;
Heinrich Schuchardt5e4947e2018-02-08 21:47:10 +0100243
Simon Glass05c17d62019-12-20 18:10:37 -0700244 while (ppix < end)
Simon Glass2baa6f82022-10-06 08:36:08 -0600245 *ppix++ = colour;
Simon Glass05c17d62019-12-20 18:10:37 -0700246 break;
247 }
Andre Przywara0cff09f2025-03-27 15:33:05 +0000248 fallthrough;
Simon Glass05c17d62019-12-20 18:10:37 -0700249 case VIDEO_BPP32:
Nikhil M Jain9e3301d2023-04-20 17:41:08 +0530250 if (CONFIG_IS_ENABLED(VIDEO_BPP32)) {
Simon Glass05c17d62019-12-20 18:10:37 -0700251 u32 *ppix = priv->fb;
252 u32 *end = priv->fb + priv->fb_size;
Simon Glass623d28f2016-01-18 19:52:15 -0700253
Simon Glass05c17d62019-12-20 18:10:37 -0700254 while (ppix < end)
Simon Glass2baa6f82022-10-06 08:36:08 -0600255 *ppix++ = colour;
Simon Glass05c17d62019-12-20 18:10:37 -0700256 break;
257 }
Andre Przywara0cff09f2025-03-27 15:33:05 +0000258 fallthrough;
Heinrich Schuchardt5e4947e2018-02-08 21:47:10 +0100259 default:
Simon Glass2baa6f82022-10-06 08:36:08 -0600260 memset(priv->fb, colour, priv->fb_size);
Heinrich Schuchardt5e4947e2018-02-08 21:47:10 +0100261 break;
Simon Glass623d28f2016-01-18 19:52:15 -0700262 }
Simon Glassf8ec6212020-07-02 21:12:22 -0600263 ret = video_sync_copy(dev, priv->fb, priv->fb + priv->fb_size);
264 if (ret)
265 return ret;
Simon Glass55343122018-10-01 12:22:26 -0600266
Michal Simeka1e136d2020-12-15 15:12:09 +0100267 return video_sync(dev, false);
Simon Glass623d28f2016-01-18 19:52:15 -0700268}
269
Simon Glass2baa6f82022-10-06 08:36:08 -0600270int video_clear(struct udevice *dev)
271{
272 struct video_priv *priv = dev_get_uclass_priv(dev);
273 int ret;
274
275 ret = video_fill(dev, priv->colour_bg);
276 if (ret)
277 return ret;
278
279 return 0;
280}
281
Simon Glass2a006332022-10-06 08:36:03 -0600282static const struct vid_rgb colours[VID_COLOUR_COUNT] = {
283 { 0x00, 0x00, 0x00 }, /* black */
284 { 0xc0, 0x00, 0x00 }, /* red */
285 { 0x00, 0xc0, 0x00 }, /* green */
286 { 0xc0, 0x60, 0x00 }, /* brown */
287 { 0x00, 0x00, 0xc0 }, /* blue */
288 { 0xc0, 0x00, 0xc0 }, /* magenta */
289 { 0x00, 0xc0, 0xc0 }, /* cyan */
290 { 0xc0, 0xc0, 0xc0 }, /* light gray */
291 { 0x80, 0x80, 0x80 }, /* gray */
292 { 0xff, 0x00, 0x00 }, /* bright red */
293 { 0x00, 0xff, 0x00 }, /* bright green */
294 { 0xff, 0xff, 0x00 }, /* yellow */
295 { 0x00, 0x00, 0xff }, /* bright blue */
296 { 0xff, 0x00, 0xff }, /* bright magenta */
297 { 0x00, 0xff, 0xff }, /* bright cyan */
298 { 0xff, 0xff, 0xff }, /* white */
Simon Glassbda3adc2024-10-14 16:31:53 -0600299
300 /* an extra one for menus */
301 { 0x40, 0x40, 0x40 }, /* dark gray */
Simon Glass2a006332022-10-06 08:36:03 -0600302};
303
Simon Glassd17a6242023-06-01 10:22:48 -0600304u32 video_index_to_colour(struct video_priv *priv, enum colour_idx idx)
Simon Glass2a006332022-10-06 08:36:03 -0600305{
306 switch (priv->bpix) {
307 case VIDEO_BPP16:
Nikhil M Jain9e3301d2023-04-20 17:41:08 +0530308 if (CONFIG_IS_ENABLED(VIDEO_BPP16)) {
Simon Glass2a006332022-10-06 08:36:03 -0600309 return ((colours[idx].r >> 3) << 11) |
310 ((colours[idx].g >> 2) << 5) |
311 ((colours[idx].b >> 3) << 0);
312 }
313 break;
314 case VIDEO_BPP32:
Nikhil M Jain9e3301d2023-04-20 17:41:08 +0530315 if (CONFIG_IS_ENABLED(VIDEO_BPP32)) {
Michal Simek985eac82023-05-17 10:42:07 +0200316 switch (priv->format) {
317 case VIDEO_X2R10G10B10:
Simon Glass2a006332022-10-06 08:36:03 -0600318 return (colours[idx].r << 22) |
319 (colours[idx].g << 12) |
320 (colours[idx].b << 2);
Michal Simek985eac82023-05-17 10:42:07 +0200321 case VIDEO_RGBA8888:
322 return (colours[idx].r << 24) |
323 (colours[idx].g << 16) |
324 (colours[idx].b << 8) | 0xff;
325 default:
Simon Glass2a006332022-10-06 08:36:03 -0600326 return (colours[idx].r << 16) |
327 (colours[idx].g << 8) |
328 (colours[idx].b << 0);
Michal Simek985eac82023-05-17 10:42:07 +0200329 }
Simon Glass2a006332022-10-06 08:36:03 -0600330 }
331 break;
332 default:
333 break;
334 }
335
336 /*
337 * For unknown bit arrangements just support
338 * black and white.
339 */
340 if (idx)
341 return 0xffffff; /* white */
342
343 return 0x000000; /* black */
344}
345
Simon Glass2b063b82018-11-06 15:21:36 -0700346void video_set_default_colors(struct udevice *dev, bool invert)
Heinrich Schuchardt290e1d82018-02-08 21:47:11 +0100347{
Simon Glass2b063b82018-11-06 15:21:36 -0700348 struct video_priv *priv = dev_get_uclass_priv(dev);
349 int fore, back;
350
Simon Glass05c17d62019-12-20 18:10:37 -0700351 if (CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK)) {
352 /* White is used when switching to bold, use light gray here */
353 fore = VID_LIGHT_GRAY;
354 back = VID_BLACK;
355 } else {
356 fore = VID_BLACK;
357 back = VID_WHITE;
358 }
Simon Glass2b063b82018-11-06 15:21:36 -0700359 if (invert) {
360 int temp;
361
362 temp = fore;
363 fore = back;
364 back = temp;
365 }
366 priv->fg_col_idx = fore;
Andre Przywara4ed5bc82019-03-23 01:29:56 +0000367 priv->bg_col_idx = back;
Simon Glass2a006332022-10-06 08:36:03 -0600368 priv->colour_fg = video_index_to_colour(priv, fore);
369 priv->colour_bg = video_index_to_colour(priv, back);
Heinrich Schuchardt290e1d82018-02-08 21:47:11 +0100370}
371
Simon Glass623d28f2016-01-18 19:52:15 -0700372/* Flush video activity to the caches */
Michal Simek632e3d42020-12-14 08:47:52 +0100373int video_sync(struct udevice *vid, bool force)
Simon Glass623d28f2016-01-18 19:52:15 -0700374{
Simon Glass7f6280f2024-07-31 08:44:09 -0600375 struct video_priv *priv = dev_get_uclass_priv(vid);
Michal Simek8ae95df2020-12-03 09:30:00 +0100376 struct video_ops *ops = video_get_ops(vid);
377 int ret;
378
379 if (ops && ops->video_sync) {
380 ret = ops->video_sync(vid);
381 if (ret)
382 return ret;
383 }
384
Simon Glasse0337a52024-07-31 08:44:10 -0600385 if (CONFIG_IS_ENABLED(CYCLIC) && !force &&
386 get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS)
387 return 0;
388
Simon Glass623d28f2016-01-18 19:52:15 -0700389 /*
390 * flush_dcache_range() is declared in common.h but it seems that some
391 * architectures do not actually implement it. Is there a way to find
392 * out whether it exists? For now, ARM is safe.
393 */
Trevor Woerner43ec7e02019-05-03 09:41:00 -0400394#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
Simon Glass623d28f2016-01-18 19:52:15 -0700395 if (priv->flush_dcache) {
396 flush_dcache_range((ulong)priv->fb,
Simon Glasseebc3fd2016-11-13 14:22:06 -0700397 ALIGN((ulong)priv->fb + priv->fb_size,
398 CONFIG_SYS_CACHELINE_SIZE));
Simon Glass623d28f2016-01-18 19:52:15 -0700399 }
400#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
Simon Glasse0337a52024-07-31 08:44:10 -0600401 sandbox_sdl_sync(priv->fb);
Simon Glass623d28f2016-01-18 19:52:15 -0700402#endif
Simon Glasse0337a52024-07-31 08:44:10 -0600403 priv->last_sync = get_timer(0);
404
Michal Simek632e3d42020-12-14 08:47:52 +0100405 return 0;
Simon Glass623d28f2016-01-18 19:52:15 -0700406}
407
408void video_sync_all(void)
409{
410 struct udevice *dev;
Michal Simek632e3d42020-12-14 08:47:52 +0100411 int ret;
Simon Glass623d28f2016-01-18 19:52:15 -0700412
413 for (uclass_find_first_device(UCLASS_VIDEO, &dev);
414 dev;
415 uclass_find_next_device(&dev)) {
Michal Simek632e3d42020-12-14 08:47:52 +0100416 if (device_active(dev)) {
417 ret = video_sync(dev, true);
418 if (ret)
419 dev_dbg(dev, "Video sync failed\n");
420 }
Simon Glass623d28f2016-01-18 19:52:15 -0700421 }
422}
423
Patrick Delaunayefcc84b2021-11-15 16:32:20 +0100424bool video_is_active(void)
425{
426 struct udevice *dev;
427
Devarsh Thakkar42e41062024-02-22 18:38:09 +0530428 /* Assume video to be active if SPL passed video hand-off to U-boot */
Simon Glassd4dce4a2024-09-29 19:49:36 -0600429 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && xpl_phase() > PHASE_SPL)
Devarsh Thakkar42e41062024-02-22 18:38:09 +0530430 return true;
431
Patrick Delaunayefcc84b2021-11-15 16:32:20 +0100432 for (uclass_find_first_device(UCLASS_VIDEO, &dev);
433 dev;
434 uclass_find_next_device(&dev)) {
435 if (device_active(dev))
436 return true;
437 }
438
439 return false;
440}
441
Simon Glass623d28f2016-01-18 19:52:15 -0700442int video_get_xsize(struct udevice *dev)
443{
444 struct video_priv *priv = dev_get_uclass_priv(dev);
445
446 return priv->xsize;
447}
448
449int video_get_ysize(struct udevice *dev)
450{
451 struct video_priv *priv = dev_get_uclass_priv(dev);
452
453 return priv->ysize;
454}
455
Simon Glass73c9c372020-07-02 21:12:20 -0600456#ifdef CONFIG_VIDEO_COPY
457int video_sync_copy(struct udevice *dev, void *from, void *to)
458{
459 struct video_priv *priv = dev_get_uclass_priv(dev);
460
461 if (priv->copy_fb) {
462 long offset, size;
463
464 /* Find the offset of the first byte to copy */
465 if ((ulong)to > (ulong)from) {
466 size = to - from;
467 offset = from - priv->fb;
468 } else {
469 size = from - to;
470 offset = to - priv->fb;
471 }
472
473 /*
474 * Allow a bit of leeway for valid requests somewhere near the
475 * frame buffer
476 */
477 if (offset < -priv->fb_size || offset > 2 * priv->fb_size) {
478#ifdef DEBUG
Simon Glass78cdc5d2021-11-19 13:23:51 -0700479 char str[120];
Simon Glass73c9c372020-07-02 21:12:20 -0600480
481 snprintf(str, sizeof(str),
Simon Glass78cdc5d2021-11-19 13:23:51 -0700482 "[** FAULT sync_copy fb=%p, from=%p, to=%p, offset=%lx]",
Simon Glass73c9c372020-07-02 21:12:20 -0600483 priv->fb, from, to, offset);
484 console_puts_select_stderr(true, str);
485#endif
486 return -EFAULT;
487 }
488
489 /*
490 * Silently crop the memcpy. This allows callers to avoid doing
491 * this themselves. It is common for the end pointer to go a
492 * few lines after the end of the frame buffer, since most of
493 * the update algorithms terminate a line after their last write
494 */
495 if (offset + size > priv->fb_size) {
496 size = priv->fb_size - offset;
497 } else if (offset < 0) {
498 size += offset;
499 offset = 0;
500 }
501
502 memcpy(priv->copy_fb + offset, priv->fb + offset, size);
503 }
504
505 return 0;
506}
Simon Glass62b535e2021-01-13 20:29:46 -0700507
508int video_sync_copy_all(struct udevice *dev)
509{
510 struct video_priv *priv = dev_get_uclass_priv(dev);
511
512 video_sync_copy(dev, priv->fb, priv->fb + priv->fb_size);
513
514 return 0;
515}
516
Simon Glass73c9c372020-07-02 21:12:20 -0600517#endif
518
Simon Glass87a3cd72021-11-19 13:24:03 -0700519#define SPLASH_DECL(_name) \
520 extern u8 __splash_ ## _name ## _begin[]; \
521 extern u8 __splash_ ## _name ## _end[]
522
523#define SPLASH_START(_name) __splash_ ## _name ## _begin
524
525SPLASH_DECL(u_boot_logo);
526
Simon Glass22477422022-10-06 08:36:09 -0600527void *video_get_u_boot_logo(void)
528{
529 return SPLASH_START(u_boot_logo);
530}
531
Simon Glass87a3cd72021-11-19 13:24:03 -0700532static int show_splash(struct udevice *dev)
533{
534 u8 *data = SPLASH_START(u_boot_logo);
535 int ret;
536
537 ret = video_bmp_display(dev, map_to_sysmem(data), -4, 4, true);
538
539 return 0;
540}
541
Simon Glass70459902022-10-06 08:36:18 -0600542int video_default_font_height(struct udevice *dev)
543{
544 struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
545
546 if (IS_ENABLED(CONFIG_CONSOLE_TRUETYPE))
547 return IF_ENABLED_INT(CONFIG_CONSOLE_TRUETYPE,
548 CONFIG_CONSOLE_TRUETYPE_SIZE);
549
550 return vc_priv->y_charsize;
551}
552
Simon Glasse0337a52024-07-31 08:44:10 -0600553static void video_idle(struct cyclic_info *cyc)
554{
555 video_sync_all();
556}
557
Simon Glass623d28f2016-01-18 19:52:15 -0700558/* Set up the display ready for use */
559static int video_post_probe(struct udevice *dev)
560{
Simon Glassb75b15b2020-12-03 16:55:23 -0700561 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
Simon Glasse0337a52024-07-31 08:44:10 -0600562 struct video_uc_priv *uc_priv = uclass_get_priv(dev->uclass);
Simon Glass623d28f2016-01-18 19:52:15 -0700563 struct video_priv *priv = dev_get_uclass_priv(dev);
564 char name[30], drv[15], *str;
Simon Glassb3a72b32016-01-14 18:10:48 -0700565 const char *drv_name = drv;
Simon Glass623d28f2016-01-18 19:52:15 -0700566 struct udevice *cons;
567 int ret;
568
569 /* Set up the line and display size */
570 priv->fb = map_sysmem(plat->base, plat->size);
Simon Glass7d186732018-11-29 15:08:52 -0700571 if (!priv->line_length)
572 priv->line_length = priv->xsize * VNBYTES(priv->bpix);
573
Simon Glass623d28f2016-01-18 19:52:15 -0700574 priv->fb_size = priv->line_length * priv->ysize;
575
Devarsh Thakkarf5254cc2023-12-05 21:25:21 +0530576 /*
577 * Set up video handoff fields for passing video blob to next stage
578 * NOTE:
579 * This assumes that reserved video memory only uses a single framebuffer
580 */
Simon Glassd4dce4a2024-09-29 19:49:36 -0600581 if (xpl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
Devarsh Thakkarf5254cc2023-12-05 21:25:21 +0530582 struct video_handoff *ho;
583
584 ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
585 if (!ho)
586 return log_msg_ret("blf", -ENOENT);
587 ho->fb = gd->video_bottom;
588 /* Fill aligned size here as calculated in video_reserve() */
589 ho->size = gd->video_top - gd->video_bottom;
590 ho->xsize = priv->xsize;
591 ho->ysize = priv->ysize;
592 ho->line_length = priv->line_length;
593 ho->bpix = priv->bpix;
Simon Glass30aaa9b2025-01-10 17:00:19 -0700594 ho->format = priv->format;
Devarsh Thakkarf5254cc2023-12-05 21:25:21 +0530595 }
596
Simon Glassb4928e52020-07-02 21:12:21 -0600597 if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->copy_base)
598 priv->copy_fb = map_sysmem(plat->copy_base, plat->size);
599
Heinrich Schuchardt290e1d82018-02-08 21:47:11 +0100600 /* Set up colors */
Simon Glass2b063b82018-11-06 15:21:36 -0700601 video_set_default_colors(dev, false);
Rob Clarkf1411882017-08-03 12:47:01 -0400602
603 if (!CONFIG_IS_ENABLED(NO_FB_CLEAR))
604 video_clear(dev);
Simon Glass623d28f2016-01-18 19:52:15 -0700605
Simon Glass84c7fb32016-01-18 19:52:17 -0700606 /*
Simon Glassb3a72b32016-01-14 18:10:48 -0700607 * Create a text console device. For now we always do this, although
Simon Glass84c7fb32016-01-18 19:52:17 -0700608 * it might be useful to support only bitmap drawing on the device
Simon Glassb3a72b32016-01-14 18:10:48 -0700609 * for boards that don't need to display text. We create a TrueType
610 * console if enabled, a rotated console if the video driver requests
611 * it, otherwise a normal console.
612 *
613 * The console can be override by setting vidconsole_drv_name before
614 * probing this video driver, or in the probe() method.
615 *
616 * TrueType does not support rotation at present so fall back to the
617 * rotated console in that case.
Simon Glass84c7fb32016-01-18 19:52:17 -0700618 */
Simon Glassb3a72b32016-01-14 18:10:48 -0700619 if (!priv->rot && IS_ENABLED(CONFIG_CONSOLE_TRUETYPE)) {
Simon Glass2ef353e2016-01-14 18:10:42 -0700620 snprintf(name, sizeof(name), "%s.vidconsole_tt", dev->name);
621 strcpy(drv, "vidconsole_tt");
622 } else {
623 snprintf(name, sizeof(name), "%s.vidconsole%d", dev->name,
624 priv->rot);
625 snprintf(drv, sizeof(drv), "vidconsole%d", priv->rot);
626 }
627
Simon Glass84c7fb32016-01-18 19:52:17 -0700628 str = strdup(name);
629 if (!str)
630 return -ENOMEM;
Simon Glassb3a72b32016-01-14 18:10:48 -0700631 if (priv->vidconsole_drv_name)
632 drv_name = priv->vidconsole_drv_name;
633 ret = device_bind_driver(dev, drv_name, str, &cons);
Simon Glass84c7fb32016-01-18 19:52:17 -0700634 if (ret) {
635 debug("%s: Cannot bind console driver\n", __func__);
636 return ret;
637 }
Simon Glassb3a72b32016-01-14 18:10:48 -0700638
Simon Glass84c7fb32016-01-18 19:52:17 -0700639 ret = device_probe(cons);
640 if (ret) {
641 debug("%s: Cannot probe console driver\n", __func__);
642 return ret;
643 }
644
Nikhil M Jain9e3301d2023-04-20 17:41:08 +0530645 if (CONFIG_IS_ENABLED(VIDEO_LOGO) &&
646 !CONFIG_IS_ENABLED(SPLASH_SCREEN) && !plat->hide_logo) {
Simon Glass87a3cd72021-11-19 13:24:03 -0700647 ret = show_splash(dev);
648 if (ret) {
649 log_debug("Cannot show splash screen\n");
650 return ret;
651 }
652 }
653
Simon Glasse0337a52024-07-31 08:44:10 -0600654 /* register cyclic as soon as the first video device is probed */
655 if (CONFIG_IS_ENABLED(CYCLIC) && (gd->flags && GD_FLG_RELOC) &&
656 !uc_priv->cyc_active) {
657 uint ms = CONFIG_IF_ENABLED_INT(CYCLIC, VIDEO_SYNC_CYCLIC_MS);
658
659 cyclic_register(&uc_priv->cyc, video_idle, ms * 1000,
660 "video_init");
661 uc_priv->cyc_active = true;
662 }
663
Simon Glass623d28f2016-01-18 19:52:15 -0700664 return 0;
665};
666
667/* Post-relocation, allocate memory for the frame buffer */
668static int video_post_bind(struct udevice *dev)
669{
Simon Glass951255d2020-07-02 21:12:32 -0600670 struct video_uc_priv *uc_priv;
671 ulong addr;
Simon Glass623d28f2016-01-18 19:52:15 -0700672 ulong size;
673
674 /* Before relocation there is nothing to do here */
Tom Rini6985a722018-04-22 09:47:48 -0400675 if (!(gd->flags & GD_FLG_RELOC))
Simon Glass623d28f2016-01-18 19:52:15 -0700676 return 0;
Simon Glass951255d2020-07-02 21:12:32 -0600677
678 /* Set up the video pointer, if this is the first device */
Simon Glass95588622020-12-22 19:30:28 -0700679 uc_priv = uclass_get_priv(dev->uclass);
Simon Glass951255d2020-07-02 21:12:32 -0600680 if (!uc_priv->video_ptr)
681 uc_priv->video_ptr = gd->video_top;
682
683 /* Allocate framebuffer space for this device */
684 addr = uc_priv->video_ptr;
Simon Glass623d28f2016-01-18 19:52:15 -0700685 size = alloc_fb(dev, &addr);
686 if (addr < gd->video_bottom) {
Bin Mengacbafdd2023-07-23 12:40:24 +0800687 /*
688 * Device tree node may need the 'bootph-all' or
Simon Glassfc1aa352023-02-13 08:56:34 -0700689 * 'bootph-some-ram' tag
Patrick Delaunayd1937182019-05-21 19:19:12 +0200690 */
Bin Mengacbafdd2023-07-23 12:40:24 +0800691 printf("Video device '%s' cannot allocate frame buffer memory "
692 "- ensure the device is set up before relocation\n",
Simon Glass623d28f2016-01-18 19:52:15 -0700693 dev->name);
694 return -ENOSPC;
695 }
696 debug("%s: Claiming %lx bytes at %lx for video device '%s'\n",
697 __func__, size, addr, dev->name);
Simon Glass951255d2020-07-02 21:12:32 -0600698 uc_priv->video_ptr = addr;
Simon Glass623d28f2016-01-18 19:52:15 -0700699
700 return 0;
701}
702
Simon Glasse0337a52024-07-31 08:44:10 -0600703__maybe_unused static int video_destroy(struct uclass *uc)
704{
705 struct video_uc_priv *uc_priv = uclass_get_priv(uc);
706
707 if (uc_priv->cyc_active) {
708 cyclic_unregister(&uc_priv->cyc);
709 uc_priv->cyc_active = false;
710 }
711
712 return 0;
713}
714
Simon Glass623d28f2016-01-18 19:52:15 -0700715UCLASS_DRIVER(video) = {
716 .id = UCLASS_VIDEO,
717 .name = "video",
718 .flags = DM_UC_FLAG_SEQ_ALIAS,
719 .post_bind = video_post_bind,
Simon Glass623d28f2016-01-18 19:52:15 -0700720 .post_probe = video_post_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700721 .priv_auto = sizeof(struct video_uc_priv),
722 .per_device_auto = sizeof(struct video_priv),
Simon Glassb75b15b2020-12-03 16:55:23 -0700723 .per_device_plat_auto = sizeof(struct video_uc_plat),
Simon Glasse0337a52024-07-31 08:44:10 -0600724 CONFIG_IS_ENABLED(CYCLIC, (.destroy = video_destroy, ))
Simon Glass623d28f2016-01-18 19:52:15 -0700725};