blob: cb8cfd2f35370be915fba0bb0bba3d1ce8ca9c45 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Michal Simeke60148d2014-01-14 14:21:52 +01002/*
Michal Simek98d0f1f2018-01-17 07:37:47 +01003 * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek
Michal Simeke60148d2014-01-14 14:21:52 +01004 */
5#include <common.h>
Simon Glass091f6a32015-10-17 19:41:22 -06006#include <debug_uart.h>
Simon Glassf11478f2019-12-28 10:45:07 -07007#include <hang.h>
Simon Glass2dc9c342020-05-10 11:40:01 -06008#include <image.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Michal Simeke60148d2014-01-14 14:21:52 +010011#include <spl.h>
Michal Simekdb2337c2020-02-18 15:03:13 +010012#include <generated/dt.h>
Michal Simeke60148d2014-01-14 14:21:52 +010013
14#include <asm/io.h>
Michal Simek162c6372014-08-11 14:03:15 +020015#include <asm/spl.h>
Simon Glass122216d2015-10-17 19:41:21 -060016#include <asm/arch/hardware.h>
Michal Simeke60148d2014-01-14 14:21:52 +010017#include <asm/arch/sys_proto.h>
Michal Simek85dc76a2017-11-08 16:14:47 +010018#include <asm/arch/ps7_init_gpl.h>
Michal Simeke60148d2014-01-14 14:21:52 +010019
Michal Simeke60148d2014-01-14 14:21:52 +010020void board_init_f(ulong dummy)
21{
22 ps7_init();
23
Michal Simeke60148d2014-01-14 14:21:52 +010024 arch_cpu_init();
Michal Simeke533ad22018-04-19 12:36:48 +020025
26#ifdef CONFIG_DEBUG_UART
27 /* Uart debug for sure */
28 debug_uart_init();
29 puts("Debug uart enabled\n"); /* or printch() */
30#endif
Michal Simeke60148d2014-01-14 14:21:52 +010031}
32
Michal Simeka831f1f2014-04-25 12:15:40 +020033#ifdef CONFIG_SPL_BOARD_INIT
34void spl_board_init(void)
35{
Simon Glasse04843d2015-10-19 06:50:02 -060036 preloader_console_init();
Michal Simek1aab1142020-09-09 14:41:56 +020037#if defined(CONFIG_ARCH_EARLY_INIT_R) && defined(CONFIG_SPL_FPGA)
Luis Araneda7d9405a2018-07-19 03:10:18 -040038 arch_early_init_r();
39#endif
Michal Simeka831f1f2014-04-25 12:15:40 +020040 board_init();
41}
42#endif
43
Michal Simeke60148d2014-01-14 14:21:52 +010044u32 spl_boot_device(void)
45{
46 u32 mode;
47
48 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
49#ifdef CONFIG_SPL_SPI_SUPPORT
50 case ZYNQ_BM_QSPI:
Michal Simeke60148d2014-01-14 14:21:52 +010051 mode = BOOT_DEVICE_SPI;
52 break;
53#endif
Michal Simek25830022015-01-13 16:04:10 +010054 case ZYNQ_BM_NAND:
55 mode = BOOT_DEVICE_NAND;
56 break;
57 case ZYNQ_BM_NOR:
58 mode = BOOT_DEVICE_NOR;
59 break;
Michal Simeke60148d2014-01-14 14:21:52 +010060#ifdef CONFIG_SPL_MMC_SUPPORT
61 case ZYNQ_BM_SD:
Michal Simeke60148d2014-01-14 14:21:52 +010062 mode = BOOT_DEVICE_MMC1;
63 break;
64#endif
Michal Simek25830022015-01-13 16:04:10 +010065 case ZYNQ_BM_JTAG:
66 mode = BOOT_DEVICE_RAM;
67 break;
Michal Simeke60148d2014-01-14 14:21:52 +010068 default:
69 puts("Unsupported boot mode selected\n");
70 hang();
71 }
72
73 return mode;
74}
75
Michal Simeke60148d2014-01-14 14:21:52 +010076#ifdef CONFIG_SPL_OS_BOOT
77int spl_start_uboot(void)
78{
79 /* boot linux */
80 return 0;
81}
82#endif
Masahiro Yamadac2d10792014-05-12 12:18:30 +090083
Michal Simek42c8c412016-05-10 07:55:52 +020084void spl_board_prepare_for_boot(void)
85{
86 ps7_post_config();
87 debug("SPL bye\n");
88}
89
Michal Simekf669e222016-05-03 14:20:17 +020090#ifdef CONFIG_SPL_LOAD_FIT
91int board_fit_config_name_match(const char *name)
92{
93 /* Just empty function now - can't decide what to choose */
Michal Simekdb2337c2020-02-18 15:03:13 +010094 debug("%s: Check %s, default %s\n", __func__, name, DEVICE_TREE);
Michal Simekf669e222016-05-03 14:20:17 +020095
Michal Simekdb2337c2020-02-18 15:03:13 +010096 if (!strcmp(name, DEVICE_TREE))
97 return 0;
98
99 return -1;
Michal Simekf669e222016-05-03 14:20:17 +0200100}
101#endif