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Stefano Babic1f76ac12011-11-30 23:56:52 +00001/*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * Copyright (C) 2009 TechNexion Ltd.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Stefano Babic1f76ac12011-11-30 23:56:52 +00008 */
9
10#ifndef __TAM3517_H
11#define __TAM3517_H
12
13/*
14 * High Level Configuration Options
15 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000016
17#define CONFIG_SYS_TEXT_BASE 0x80008000
18
Stefano Babic1f76ac12011-11-30 23:56:52 +000019#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050020#include <asm/arch/omap.h>
Stefano Babic1f76ac12011-11-30 23:56:52 +000021
Stefano Babic1f76ac12011-11-30 23:56:52 +000022/* Clock Defines */
23#define V_OSCK 26000000 /* Clock output from T2 */
24#define V_SCLK (V_OSCK >> 1)
25
Stefano Babic1f76ac12011-11-30 23:56:52 +000026#define CONFIG_MISC_INIT_R
27
28#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
29#define CONFIG_SETUP_MEMORY_TAGS
30#define CONFIG_INITRD_TAG
31#define CONFIG_REVISION_TAG
32
33/*
34 * Size of malloc() pool
35 */
36#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
37#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
38 2 * 1024 * 1024)
39/*
40 * DDR related
41 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000042#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
43
44/*
45 * Hardware drivers
46 */
47
48/*
49 * NS16550 Configuration
50 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000051#define CONFIG_SYS_NS16550_SERIAL
52#define CONFIG_SYS_NS16550_REG_SIZE (-4)
53#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
54
55/*
56 * select serial console configuration
57 */
58#define CONFIG_CONS_INDEX 1
59#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
60#define CONFIG_SERIAL1 /* UART1 */
61
62/* allow to overwrite serial and ethaddr */
63#define CONFIG_ENV_OVERWRITE
Stefano Babic1f76ac12011-11-30 23:56:52 +000064#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
65 115200}
Stefano Babic1f76ac12011-11-30 23:56:52 +000066/* EHCI */
Stefano Babic1f76ac12011-11-30 23:56:52 +000067#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
Stefano Babic1f76ac12011-11-30 23:56:52 +000068
Heiko Schocherf53f2b82013-10-22 11:03:18 +020069#define CONFIG_SYS_I2C
70#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
71#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
Stefano Babicf39fd592012-08-29 01:21:59 +000072#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
73#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
74#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
Stefano Babic1f76ac12011-11-30 23:56:52 +000075
76/*
77 * Board NAND Info.
78 */
79#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
80 /* to access */
81 /* nand at CS0 */
82
83#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
84 /* NAND devices */
Stefano Babic1f76ac12011-11-30 23:56:52 +000085
86#define CONFIG_AUTO_COMPLETE
87
88/*
89 * Miscellaneous configurable options
90 */
91#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefano Babic1f76ac12011-11-30 23:56:52 +000092#define CONFIG_CMDLINE_EDITING
93#define CONFIG_AUTO_COMPLETE
94#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
95
Stefano Babic1f76ac12011-11-30 23:56:52 +000096#define CONFIG_SYS_MAXARGS 32 /* max number of command */
97 /* args */
Stefano Babic1f76ac12011-11-30 23:56:52 +000098/* memtest works on */
99#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
100#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
101 0x01F00000) /* 31MB */
102
103#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
104 /* address */
105
106/*
107 * AM3517 has 12 GP timers, they can be driven by the system clock
108 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
109 * This rate is divided by a local divisor.
110 */
111#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
112#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000113
114/*
Stefano Babic1f76ac12011-11-30 23:56:52 +0000115 * Physical Memory Map
116 */
117#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
118#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Stefano Babic1f76ac12011-11-30 23:56:52 +0000119#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
120
121/*
122 * FLASH and environment organization
123 */
124
125/* **** PISMO SUPPORT *** */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000126#define CONFIG_NAND_OMAP_GPMC
Stefano Babic1f76ac12011-11-30 23:56:52 +0000127
128/* Redundant Environment */
129#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
Adam Ford6b1c1652017-09-04 21:08:02 -0500130#define CONFIG_ENV_OFFSET 0x180000
131#define CONFIG_ENV_ADDR 0x180000
Stefano Babic1f76ac12011-11-30 23:56:52 +0000132#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
133 2 * CONFIG_SYS_ENV_SECT_SIZE)
134#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
135
136#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
137#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
138#define CONFIG_SYS_INIT_RAM_SIZE 0x800
139#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
140 CONFIG_SYS_INIT_RAM_SIZE - \
141 GENERATED_GBL_DATA_SIZE)
142
143/*
144 * ethernet support, EMAC
145 *
146 */
147#define CONFIG_DRIVER_TI_EMAC
148#define CONFIG_DRIVER_TI_EMAC_USE_RMII
149#define CONFIG_MII
Stefano Babic1f76ac12011-11-30 23:56:52 +0000150#define CONFIG_BOOTP_DNS
151#define CONFIG_BOOTP_DNS2
152#define CONFIG_BOOTP_SEND_HOSTNAME
153#define CONFIG_NET_RETRY_COUNT 10
Stefano Babic1f76ac12011-11-30 23:56:52 +0000154
155/* Defines for SPL */
Tom Rini28591df2012-08-13 12:03:19 -0700156#define CONFIG_SPL_FRAMEWORK
Stefano Babic1f76ac12011-11-30 23:56:52 +0000157#define CONFIG_SPL_CONSOLE
158#define CONFIG_SPL_NAND_SIMPLE
Jeroen Hofstee64407af2013-12-21 18:03:09 +0100159#define CONFIG_SPL_NAND_SOFTECC
Stefano Babic1f76ac12011-11-30 23:56:52 +0000160#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
161
Scott Woodc352a0c2012-09-20 19:09:07 -0500162#define CONFIG_SPL_NAND_BASE
163#define CONFIG_SPL_NAND_DRIVERS
164#define CONFIG_SPL_NAND_ECC
Stefano Babic1f76ac12011-11-30 23:56:52 +0000165
166#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinicfff4aa2016-08-26 13:30:43 -0400167#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
168 CONFIG_SPL_TEXT_BASE)
Stefano Babice0faf3c2016-06-14 09:13:37 +0200169#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
Stefano Babic1f76ac12011-11-30 23:56:52 +0000170
171#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
172#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
173#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
174#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
175
Stefano Babice0faf3c2016-06-14 09:13:37 +0200176#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
177#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
178
179/* FAT */
180#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
181#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
182
183/* RAW SD card / eMMC */
184#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
185#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
186#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
187
Stefano Babic1f76ac12011-11-30 23:56:52 +0000188/* NAND boot config */
Stefano Babic0cd41182015-07-26 15:18:15 +0200189#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
Stefano Babic1f76ac12011-11-30 23:56:52 +0000190#define CONFIG_SYS_NAND_PAGE_COUNT 64
191#define CONFIG_SYS_NAND_PAGE_SIZE 2048
192#define CONFIG_SYS_NAND_OOBSIZE 64
193#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
194#define CONFIG_SYS_NAND_5_ADDR_CYCLE
195#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
196#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
197 48, 49, 50, 51, 52, 53, 54, 55,\
198 56, 57, 58, 59, 60, 61, 62, 63}
199#define CONFIG_SYS_NAND_ECCSIZE 256
200#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3ef49732013-11-18 19:03:01 +0530201#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Jeroen Hofstee6bd1ecf2015-05-30 10:11:25 +0200202#define CONFIG_NAND_OMAP_GPMC_PREFETCH
Stefano Babic1f76ac12011-11-30 23:56:52 +0000203
Stefano Babic1f76ac12011-11-30 23:56:52 +0000204#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
205
206#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
207#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
208
Stefano Babic1f76ac12011-11-30 23:56:52 +0000209#define CONFIG_MTD_PARTITIONS
210#define CONFIG_MTD_DEVICE
Stefano Babic1f76ac12011-11-30 23:56:52 +0000211
212/* Setup MTD for NAND on the SOM */
213#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
214#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
Stefano Babic18db74a2012-02-07 23:29:34 +0000215 "1m(u-boot),256k(env1)," \
216 "256k(env2),6m(kernel),-(rootfs)"
Stefano Babic1f76ac12011-11-30 23:56:52 +0000217
Stefano Babic1f76ac12011-11-30 23:56:52 +0000218#define CONFIG_TAM3517_SETTINGS \
219 "netdev=eth0\0" \
220 "nandargs=setenv bootargs root=${nandroot} " \
221 "rootfstype=${nandrootfstype}\0" \
222 "nfsargs=setenv bootargs root=/dev/nfs rw " \
223 "nfsroot=${serverip}:${rootpath}\0" \
224 "ramargs=setenv bootargs root=/dev/ram rw\0" \
225 "addip_sta=setenv bootargs ${bootargs} " \
226 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
227 ":${hostname}:${netdev}:off panic=1\0" \
228 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
229 "addip=if test -n ${ipdyn};then run addip_dyn;" \
230 "else run addip_sta;fi\0" \
231 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
232 "addtty=setenv bootargs ${bootargs}" \
233 " console=ttyO0,${baudrate}\0" \
234 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
235 "loadaddr=82000000\0" \
236 "kernel_addr_r=82000000\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200237 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
238 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000239 "flash_self=run ramargs addip addtty addmtd addmisc;" \
240 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
241 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
242 "bootm ${kernel_addr}\0" \
243 "nandboot=run nandargs addip addtty addmtd addmisc;" \
244 "nand read ${kernel_addr_r} kernel\0" \
245 "bootm ${kernel_addr_r}\0" \
246 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
247 "run nfsargs addip addtty addmtd addmisc;" \
248 "bootm ${kernel_addr_r}\0" \
249 "net_self=if run net_self_load;then " \
250 "run ramargs addip addtty addmtd addmisc;" \
251 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
252 "else echo Images not loades;fi\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200253 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000254 "load=tftp ${loadaddr} ${u-boot}\0" \
255 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200256 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000257 "uboot_addr=0x80000\0" \
258 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
259 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
260 "updatemlo=nandecc hw;nand erase 0 20000;" \
261 "nand write ${loadaddr} 0 20000\0" \
262 "upd=if run load;then echo Updating u-boot;if run update;" \
263 "then echo U-Boot updated;" \
264 "else echo Error updating u-boot !;" \
265 "echo Board without bootloader !!;" \
266 "fi;" \
267 "else echo U-Boot not downloaded..exiting;fi\0" \
268
Stefano Babicf39fd592012-08-29 01:21:59 +0000269/*
270 * this is common code for all TAM3517 boards.
271 * MAC address is stored from manufacturer in
272 * I2C EEPROM
273 */
274#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
Stefano Babicf39fd592012-08-29 01:21:59 +0000275/*
276 * The I2C EEPROM on the TAM3517 contains
277 * mac address and production data
278 */
279struct tam3517_module_info {
280 char customer[48];
281 char product[48];
282
283 /*
284 * bit 0~47 : sequence number
285 * bit 48~55 : week of year, from 0.
286 * bit 56~63 : year
287 */
288 unsigned long long sequence_number;
289
290 /*
291 * bit 0~7 : revision fixed
292 * bit 8~15 : revision major
293 * bit 16~31 : TNxxx
294 */
295 unsigned int revision;
296 unsigned char eth_addr[4][8];
297 unsigned char _rev[100];
298};
299
Stefano Babic0a152e62012-11-23 05:19:25 +0000300#define TAM3517_READ_EEPROM(info, ret) \
301do { \
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200302 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000303 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
Stefano Babic0a152e62012-11-23 05:19:25 +0000304 (void *)info, sizeof(*info))) \
305 ret = 1; \
306 else \
307 ret = 0; \
308} while (0)
309
310#define TAM3517_READ_MAC_FROM_EEPROM(info) \
311do { \
312 char buf[80], ethname[20]; \
313 int i; \
Stefano Babicf39fd592012-08-29 01:21:59 +0000314 memset(buf, 0, sizeof(buf)); \
Stefano Babic0a152e62012-11-23 05:19:25 +0000315 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
Stefano Babicf39fd592012-08-29 01:21:59 +0000316 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
Stefano Babic0a152e62012-11-23 05:19:25 +0000317 (info)->eth_addr[i][5], \
318 (info)->eth_addr[i][4], \
319 (info)->eth_addr[i][3], \
320 (info)->eth_addr[i][2], \
321 (info)->eth_addr[i][1], \
322 (info)->eth_addr[i][0]); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000323 \
324 if (i) \
325 sprintf(ethname, "eth%daddr", i); \
326 else \
Ben Whitten34fd6c92015-12-30 13:05:58 +0000327 strcpy(ethname, "ethaddr"); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000328 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
Simon Glass6a38e412017-08-03 12:22:09 -0600329 env_set(ethname, buf); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000330 } \
331} while (0)
Stefano Babic0a152e62012-11-23 05:19:25 +0000332
333/* The following macros are taken from Technexion's documentation */
334#define TAM3517_sequence_number(info) \
335 ((info)->sequence_number % 0x1000000000000LL)
336#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
337#define TAM3517_year(info) ((info)->sequence_number >> 56)
338#define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
339#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
340#define TAM3517_revision_tn(info) ((info)->revision >> 16)
341
342#define TAM3517_PRINT_SOM_INFO(info) \
343do { \
344 printf("Vendor:%s\n", (info)->customer); \
345 printf("SOM: %s\n", (info)->product); \
346 printf("SeqNr: %02llu%02llu%012llu\n", \
347 TAM3517_year(info), \
348 TAM3517_week_of_year(info), \
349 TAM3517_sequence_number(info)); \
350 printf("Rev: TN%u %u.%u\n", \
351 TAM3517_revision_tn(info), \
352 TAM3517_revision_major(info), \
353 TAM3517_revision_fixed(info)); \
354} while (0)
355
Stefano Babicf39fd592012-08-29 01:21:59 +0000356#endif
357
Stefano Babic1f76ac12011-11-30 23:56:52 +0000358#endif /* __TAM3517_H */