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git01.mediatek.com / filogic / uboot / 0c9ffe3ec66ebdb797ed48e6700fa9ca0558870a / . / arch / sh / lib / start.S
blob: ee79b4fdd0c5067131440e57317d0cf31e47954e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]2/*
Vladimir Zapolskiy946c8c82016-11-28 00:15:33 +0200[diff] [blame]3 * Copyright (C) 2016 Vladimir Zapolskiy <vz@mleia.com>
4 * Copyright (C) 2007, 2010 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]5 */
6
Wolfgang Denk0191e472010-10-26 14:34:52 +0200[diff] [blame]7#include <asm-offsets.h>
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]8#include <config.h>
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]9
10 .text
11 .align 2
12
13 .global _start
Vladimir Zapolskiy946c8c82016-11-28 00:15:33 +0200[diff] [blame]14_start:
Vladimir Zapolskiy41e163f2016-11-28 00:15:34 +0200[diff] [blame]15#ifdef CONFIG_CPU_SH2
16 .long 0x00000010 /* Ppower ON reset PC*/
17 .long 0x00000000
18 .long 0x00000010 /* Manual reset PC */
19 .long 0x00000000
20#endif
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]21 mov.l ._lowlevel_init, r0
22100: bsrf r0
23 nop
24
25 bsr 1f
26 nop
271: sts pr, r5
Wolfgang Denk0a5c2142007-12-27 01:52:50 +0100[diff] [blame]28 mov.l ._reloc_dst, r4
Vladimir Zapolskiy946c8c82016-11-28 00:15:33 +0200[diff] [blame]29 add #(_start-1b), r5
Wolfgang Denk0a5c2142007-12-27 01:52:50 +0100[diff] [blame]30 mov.l ._reloc_dst_end, r6
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]31
322: mov.l @r5+, r1
33 mov.l r1, @r4
34 add #4, r4
35 cmp/hs r6, r4
36 bf 2b
Wolfgang Denk0a5c2142007-12-27 01:52:50 +0100[diff] [blame]37
38 mov.l ._bss_start, r4
39 mov.l ._bss_end, r5
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]40 mov #0, r1
41
Wolfgang Denk0a5c2142007-12-27 01:52:50 +0100[diff] [blame]423: mov.l r1, @r4 /* bss clear */
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]43 add #4, r4
44 cmp/hs r5, r4
45 bf 3b
46
47 mov.l ._gd_init, r13 /* global data */
48 mov.l ._stack_init, r15 /* stack */
49
Vladimir Zapolskiy946c8c82016-11-28 00:15:33 +0200[diff] [blame]50 mov.l ._sh_generic_init, r0
51 jsr @r0
52 mov #0, r4
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]53
54loop:
55 bra loop
56
57 .align 2
58
59._lowlevel_init: .long (lowlevel_init - (100b + 4))
Vladimir Zapolskiy946c8c82016-11-28 00:15:33 +0200[diff] [blame]60._reloc_dst: .long _start
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900[diff] [blame]61._reloc_dst_end: .long reloc_dst_end
62._bss_start: .long bss_start
63._bss_end: .long bss_end
Vladimir Zapolskiy946c8c82016-11-28 00:15:33 +0200[diff] [blame]64._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE)
65._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
66._sh_generic_init: .long board_init_f