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git01.mediatek.com / filogic / uboot / 0c9ffe3ec66ebdb797ed48e6700fa9ca0558870a / . / arch / arm / mach-at91 / armv7 / u-boot-spl.lds
blob: 22237cffc92f1ecaa3833cbd5c949d84022a91db [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Bo Shenf92b2982013-11-15 11:12:38 +0800[diff] [blame]2/*
3 * (C) Copyright 2002
4 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
5 *
6 * (C) Copyright 2010
7 * Texas Instruments, <www.ti.com>
8 * Aneesh V <aneesh@ti.com>
9 *
10 * (C) 2013 Atmel Corporation
11 * Bo Shen <voice.shen@atmel.com>
Bo Shenf92b2982013-11-15 11:12:38 +0800[diff] [blame]12 */
13
14MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
15 LENGTH = CONFIG_SPL_MAX_SIZE }
16MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
17 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
18
19OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
20OUTPUT_ARCH(arm)
21ENTRY(_start)
22SECTIONS
23{
24 .text :
25 {
26 __start = .;
Benoît Thébaudeau3f7740f2014-08-21 15:43:11 +0200[diff] [blame]27 *(.vectors)
Bo Shenf92b2982013-11-15 11:12:38 +0800[diff] [blame]28 arch/arm/cpu/armv7/start.o (.text*)
29 *(.text*)
30 } >.sram
31
32 . = ALIGN(4);
33 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
34
35 . = ALIGN(4);
36 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
37
38 . = ALIGN(4);
Tom Rini0ed608e2016-03-15 17:56:29 -0400[diff] [blame]39 .u_boot_list : { KEEP(*(SORT(.u_boot_list*))) } > .sram
40
41 . = ALIGN(4);
Bo Shenf92b2982013-11-15 11:12:38 +0800[diff] [blame]42 __image_copy_end = .;
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100[diff] [blame]43
44 .end :
45 {
46 *(.__end)
47 } >.sram
Bo Shenf92b2982013-11-15 11:12:38 +0800[diff] [blame]48
Wenyou Yang608b4eb2017-03-24 11:34:06 +0800[diff] [blame]49 _image_binary_end = .;
50
Bo Shenf92b2982013-11-15 11:12:38 +0800[diff] [blame]51 .bss :
52 {
53 . = ALIGN(4);
54 __bss_start = .;
55 *(.bss*)
56 . = ALIGN(4);
57 __bss_end = .;
58 } >.sdram
59}