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Daniel Hellstrom207e6952008-03-28 10:00:33 +01001/* Initializes CPU and basic hardware such as memory
2 * controllers, IRQ controller and system timer 0.
3 *
4 * (C) Copyright 2007
5 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom207e6952008-03-28 10:00:33 +01008 */
9
10#include <common.h>
11#include <asm/asi.h>
12#include <asm/leon.h>
13
14#include <config.h>
15
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +020016#define TIMER_BASE_CLK 1000000
17#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
18
Daniel Hellstrom207e6952008-03-28 10:00:33 +010019DECLARE_GLOBAL_DATA_PTR;
20
21/* reset CPU (jump to 0, without reset) */
22void start(void);
23
24struct {
25 gd_t gd_area;
26 bd_t bd;
27} global_data;
28
29/*
30 * Breath some life into the CPU...
31 *
32 * Set up the memory map,
33 * initialize a bunch of registers.
34 *
35 * Run from FLASH/PROM:
Loïc Minier5d0569a2011-02-03 22:04:26 +010036 * - until memory controller is set up, only registers available
Daniel Hellstrom207e6952008-03-28 10:00:33 +010037 * - no global variables available for writing
Loïc Minier5d0569a2011-02-03 22:04:26 +010038 * - constants available
Daniel Hellstrom207e6952008-03-28 10:00:33 +010039 */
40
41void cpu_init_f(void)
42{
43 LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
44
45 /* initialize the IRQMP */
46 leon2->Interrupt_Force = 0;
47 leon2->Interrupt_Pending = 0;
48 leon2->Interrupt_Clear = 0xfffe; /* clear all old pending interrupts */
49 leon2->Interrupt_Mask = 0xfffe0000; /* mask all IRQs */
50
51 /* cache */
52
53 /* I/O port setup */
54#ifdef LEON2_IO_PORT_DIR
55 leon2->PIO_Direction = LEON2_IO_PORT_DIR;
56#endif
57#ifdef LEON2_IO_PORT_DATA
58 leon2->PIO_Data = LEON2_IO_PORT_DATA;
59#endif
60#ifdef LEON2_IO_PORT_INT
61 leon2->PIO_Interrupt = LEON2_IO_PORT_INT;
62#else
63 leon2->PIO_Interrupt = 0;
64#endif
65}
66
67void cpu_init_f2(void)
68{
69
70}
71
72/*
73 * initialize higher level parts of CPU like time base and timers
74 */
75int cpu_init_r(void)
76{
77 LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
78
79 /* initialize prescaler common to all timers to 1MHz */
80 leon2->Scaler_Counter = leon2->Scaler_Reload =
81 (((CONFIG_SYS_CLK_FREQ / 1000) + 500) / 1000) - 1;
82
83 return (0);
84}
85
86/* Uses Timer 0 to get accurate
87 * pauses. Max 2 raised to 32 ticks
88 *
89 */
90void cpu_wait_ticks(unsigned long ticks)
91{
92 unsigned long start = get_timer(0);
93 while (get_timer(start) < ticks) ;
94}
95
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +020096/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
Daniel Hellstrom207e6952008-03-28 10:00:33 +010097 * Return irq number for timer int or a negative number for
98 * dealing with self
99 */
100int timer_interrupt_init_cpu(void)
101{
102 LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
103
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200104 /* SYS_HZ ticks per second */
Daniel Hellstrom207e6952008-03-28 10:00:33 +0100105 leon2->Timer_Counter_1 = 0;
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200106 leon2->Timer_Reload_1 = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
Daniel Hellstrom207e6952008-03-28 10:00:33 +0100107 leon2->Timer_Control_1 =
108 (LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | LEON2_TIMER_CTRL_LD);
109
110 return LEON2_TIMER1_IRQNO;
111}
112
Daniel Hellstrom9c2a0f22014-05-08 18:52:37 +0200113ulong get_tbclk(void)
114{
115 return TIMER_BASE_CLK;
116}
117
Daniel Hellstrom207e6952008-03-28 10:00:33 +0100118/*
119 * This function is intended for SHORT delays only.
120 */
121unsigned long cpu_usec2ticks(unsigned long usec)
122{
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200123 if (usec < US_PER_TICK)
Daniel Hellstrom207e6952008-03-28 10:00:33 +0100124 return 1;
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200125 return usec / US_PER_TICK;
Daniel Hellstrom207e6952008-03-28 10:00:33 +0100126}
127
128unsigned long cpu_ticks2usec(unsigned long ticks)
129{
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200130 return ticks * US_PER_TICK;
Daniel Hellstrom207e6952008-03-28 10:00:33 +0100131}