wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
| 11 | /* |
| 12 | * High Level Configuration Options |
| 13 | * (easy to change) |
| 14 | */ |
| 15 | |
Masahiro Yamada | 608ed2c | 2014-01-16 11:03:07 +0900 | [diff] [blame] | 16 | #define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 17 | #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 18 | |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 19 | /* |
| 20 | * allowed and functional CONFIG_SYS_TEXT_BASE values: |
| 21 | * 0xfe000000 low boot at 0x00000100 (default board setting) |
| 22 | * 0x00100000 RAM load and test |
| 23 | */ |
| 24 | #define CONFIG_SYS_TEXT_BASE 0xFE000000 |
| 25 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 26 | #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 27 | |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 28 | #define CONFIG_BOARD_EARLY_INIT_R |
| 29 | |
Becky Bruce | 03ea1be | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 30 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 31 | |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 32 | /* |
| 33 | * Serial console configuration |
| 34 | */ |
| 35 | #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 37 | |
| 38 | /* |
Jon Loeliger | e54e77a | 2007-07-10 09:29:01 -0500 | [diff] [blame] | 39 | * BOOTP options |
| 40 | */ |
| 41 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 42 | #define CONFIG_BOOTP_BOOTPATH |
| 43 | #define CONFIG_BOOTP_GATEWAY |
| 44 | #define CONFIG_BOOTP_HOSTNAME |
| 45 | |
Jon Loeliger | e54e77a | 2007-07-10 09:29:01 -0500 | [diff] [blame] | 46 | /* |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 47 | * Command line configuration. |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 48 | */ |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 49 | #define CONFIG_CMD_DATE |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 50 | #define CONFIG_CMD_IMMAP |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 51 | #define CONFIG_CMD_REGINFO |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 52 | |
| 53 | /* |
| 54 | * MUST be low boot - HIGHBOOT is not supported anymore |
| 55 | */ |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 56 | #if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 57 | # define CONFIG_SYS_LOWBOOT 1 |
| 58 | # define CONFIG_SYS_LOWBOOT16 1 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 59 | #else |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 60 | # error "CONFIG_SYS_TEXT_BASE must be 0xFE000000" |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 61 | #endif |
| 62 | |
| 63 | /* |
| 64 | * Autobooting |
| 65 | */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 66 | |
| 67 | #define CONFIG_PREBOOT "echo;" \ |
Wolfgang Denk | 1baed66 | 2008-03-03 12:16:44 +0100 | [diff] [blame] | 68 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 69 | "echo" |
| 70 | |
| 71 | #undef CONFIG_BOOTARGS |
| 72 | |
| 73 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 74 | "netdev=eth0\0" \ |
| 75 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 76 | "nfsroot=${serverip}:${rootpath}\0" \ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 77 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 78 | "addip=setenv bootargs ${bootargs} " \ |
| 79 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 80 | ":${hostname}:${netdev}:off panic=1\0" \ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 81 | "flash_nfs=run nfsargs addip;" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 82 | "bootm ${kernel_addr}\0" \ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 83 | "flash_self=run ramargs addip;" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 84 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
| 85 | "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 86 | "rootpath=/opt/eldk/ppc_6xx\0" \ |
| 87 | "bootfile=/tftpboot/canmb/uImage\0" \ |
| 88 | "" |
| 89 | |
| 90 | #define CONFIG_BOOTCOMMAND "run flash_self" |
| 91 | |
| 92 | /* |
| 93 | * IPB Bus clocking configuration. |
| 94 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 96 | |
| 97 | /* |
| 98 | * Flash configuration, expect one 16 Megabyte Bank at most |
| 99 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 100 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 |
| 101 | #define CONFIG_SYS_FLASH_SIZE 0x02000000 |
| 102 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ |
| 103 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 104 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
| 106 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 107 | |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 108 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 109 | #define CONFIG_SYS_FLASH_CFI |
| 110 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 111 | |
| 112 | /* |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 113 | * Environment settings |
| 114 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 115 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 116 | #define CONFIG_ENV_OFFSET (2*128*1024) |
| 117 | #define CONFIG_ENV_SIZE 0x2000 |
| 118 | #define CONFIG_ENV_SECT_SIZE (128*1024) |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 119 | |
| 120 | /* |
| 121 | * Memory map |
| 122 | * |
| 123 | * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000 |
| 124 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */ |
| 126 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 127 | #define CONFIG_SYS_DEFAULT_MBAR 0x80000000 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 128 | |
| 129 | /* Use SRAM until RAM will be available */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 131 | #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 132 | |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 135 | |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
| 138 | # define CONFIG_SYS_RAMBOOT 1 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 139 | #endif |
| 140 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
| 142 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 143 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 144 | |
| 145 | /* |
| 146 | * Ethernet configuration |
| 147 | */ |
| 148 | #define CONFIG_MPC5xxx_FEC 1 |
Ben Warren | bc1b917 | 2009-02-05 23:58:25 -0800 | [diff] [blame] | 149 | #define CONFIG_MPC5xxx_FEC_MII100 |
wdenk | faaa602 | 2005-04-21 21:10:22 +0000 | [diff] [blame] | 150 | #define CONFIG_PHY_ADDR 0x0 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 151 | /* |
| 152 | * GPIO configuration: |
| 153 | * PSC1,2,3 predefined as UART |
| 154 | * PCI disabled |
| 155 | * Ethernet 100 with MD |
| 156 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 157 | #define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 158 | |
| 159 | /* |
| 160 | * Miscellaneous configurable options |
| 161 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 163 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 165 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 166 | # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 167 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 168 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 169 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 170 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 171 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 172 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
| 173 | #define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 174 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 175 | #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */ |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 176 | |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 177 | #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ |
| 178 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 179 | #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 180 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 181 | # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
Jon Loeliger | 37ec35e | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 182 | #endif |
| 183 | |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 184 | /* |
| 185 | * Various low-level settings |
| 186 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 187 | #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI |
| 188 | #define CONFIG_SYS_HID0_FINAL HID0_ICE |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 189 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE |
| 191 | #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE |
| 192 | #define CONFIG_SYS_BOOTCS_CFG 0x00047D01 |
| 193 | #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE |
| 194 | #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 195 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 196 | #define CONFIG_SYS_CS_BURST 0x00000000 |
| 197 | #define CONFIG_SYS_CS_DEADCYCLE 0x33333333 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 198 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 199 | #define CONFIG_SYS_RESET_ADDRESS 0x7f000000 |
wdenk | f1d0ff4 | 2005-04-13 23:15:10 +0000 | [diff] [blame] | 200 | |
| 201 | #endif /* __CONFIG_H */ |