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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiewf7d060c2008-01-14 17:19:54 -06002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang35d23df2012-03-26 21:49:05 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiewf7d060c2008-01-14 17:19:54 -06007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiewf7d060c2008-01-14 17:19:54 -06008 */
9
10#include <config.h>
11#include <common.h>
12#include <asm/io.h>
13#include <asm/immap.h>
14
TsiChungLiewf7d060c2008-01-14 17:19:54 -060015#if defined(CONFIG_CMD_NAND)
16#include <nand.h>
17#include <linux/mtd/mtd.h>
Tom Rini3bde7e22021-09-22 14:50:35 -040018#include <linux/mtd/rawnand.h>
TsiChungLiewf7d060c2008-01-14 17:19:54 -060019
20#define SET_CLE 0x10
TsiChungLiewf7d060c2008-01-14 17:19:54 -060021#define SET_ALE 0x08
TsiChungLiewf7d060c2008-01-14 17:19:54 -060022
Scott Woodfdda9462008-08-13 17:53:48 -050023static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
TsiChungLiewf7d060c2008-01-14 17:19:54 -060024{
Scott Wood17fed142016-05-30 13:57:56 -050025 struct nand_chip *this = mtd_to_nand(mtdinfo);
TsiChung Liew476f6bc2008-10-24 12:59:12 +000026 volatile u16 *nCE = (u16 *) CONFIG_SYS_LATCH_ADDR;
TsiChungLiewf7d060c2008-01-14 17:19:54 -060027
Scott Woodfdda9462008-08-13 17:53:48 -050028 if (ctrl & NAND_CTRL_CHANGE) {
29 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
TsiChungLiewf7d060c2008-01-14 17:19:54 -060030
TsiChung Liew476f6bc2008-10-24 12:59:12 +000031 IO_ADDR_W &= ~(SET_ALE | SET_CLE);
TsiChung Liew476f6bc2008-10-24 12:59:12 +000032
33 if (ctrl & NAND_NCE)
TsiChung Liew64979662009-03-02 19:16:45 +000034 *nCE &= 0xFFFB;
35 else
TsiChung Liew476f6bc2008-10-24 12:59:12 +000036 *nCE |= 0x0004;
TsiChung Liew64979662009-03-02 19:16:45 +000037
Scott Woodfdda9462008-08-13 17:53:48 -050038 if (ctrl & NAND_CLE)
39 IO_ADDR_W |= SET_CLE;
40 if (ctrl & NAND_ALE)
41 IO_ADDR_W |= SET_ALE;
TsiChungLiewf7d060c2008-01-14 17:19:54 -060042
Scott Woodfdda9462008-08-13 17:53:48 -050043 this->IO_ADDR_W = (void *)IO_ADDR_W;
TsiChungLiewf7d060c2008-01-14 17:19:54 -060044
Scott Woodfdda9462008-08-13 17:53:48 -050045 }
46
47 if (cmd != NAND_CMD_NONE)
48 writeb(cmd, this->IO_ADDR_W);
TsiChungLiewf7d060c2008-01-14 17:19:54 -060049}
50
51int board_nand_init(struct nand_chip *nand)
52{
Alison Wang35d23df2012-03-26 21:49:05 +000053 gpio_t *gpio = (gpio_t *) MMAP_GPIO;
54 fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
TsiChungLiewf7d060c2008-01-14 17:19:54 -060055
Alison Wang35d23df2012-03-26 21:49:05 +000056 clrbits_be32(&fbcs->csmr2, FBCS_CSMR_WP);
TsiChungLiewf7d060c2008-01-14 17:19:54 -060057
TsiChung Liew476f6bc2008-10-24 12:59:12 +000058 /*
59 * set up pin configuration - enabled 2nd output buffer's signals
60 * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc)
61 * to use nCE signal
62 */
Alison Wang35d23df2012-03-26 21:49:05 +000063 clrbits_8(&gpio->par_timer, GPIO_PAR_TIN3_TIN3);
64 setbits_8(&gpio->pddr_timer, 0x08);
65 setbits_8(&gpio->ppd_timer, 0x08);
66 out_8(&gpio->pclrr_timer, 0);
67 out_8(&gpio->podr_timer, 0);
TsiChungLiewf7d060c2008-01-14 17:19:54 -060068
TsiChung Liew64979662009-03-02 19:16:45 +000069 nand->chip_delay = 60;
Scott Woodfdda9462008-08-13 17:53:48 -050070 nand->ecc.mode = NAND_ECC_SOFT;
71 nand->cmd_ctrl = nand_hwcontrol;
TsiChungLiewf7d060c2008-01-14 17:19:54 -060072
73 return 0;
74}
75#endif