Svyatoslav Ryhel | fcb1d91 | 2023-06-30 10:29:05 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2010-2013 |
| 4 | * NVIDIA Corporation <www.nvidia.com> |
| 5 | * |
| 6 | * (C) Copyright 2022 |
| 7 | * Svyatoslav Ryhel <clamor95@gmail.com> |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <dm.h> |
| 12 | #include <env.h> |
| 13 | #include <fdt_support.h> |
| 14 | #include <i2c.h> |
| 15 | #include <log.h> |
| 16 | #include <asm/arch/pinmux.h> |
| 17 | #include <asm/arch/clock.h> |
| 18 | #include <asm/arch/gpio.h> |
| 19 | #include <asm/arch/tegra.h> |
| 20 | #include <asm/arch-tegra/fuse.h> |
| 21 | #include <asm/gpio.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include "pinmux-config-x3.h" |
| 24 | |
| 25 | #define MAX77663_I2C_ADDR 0x1C |
| 26 | |
| 27 | #define MAX77663_REG_SD2 0x18 |
| 28 | #define MAX77663_REG_LDO2 0x27 |
| 29 | #define MAX77663_REG_LDO3 0x29 |
| 30 | #define MAX77663_REG_LDO5 0x2D |
| 31 | #define MAX77663_REG_ONOFF_CFG1 0x41 |
| 32 | #define ONOFF_PWR_OFF BIT(1) |
| 33 | |
| 34 | #ifdef CONFIG_CMD_POWEROFF |
| 35 | int do_poweroff(struct cmd_tbl *cmdtp, int flag, |
| 36 | int argc, char *const argv[]) |
| 37 | { |
| 38 | struct udevice *dev; |
| 39 | uchar data_buffer[1]; |
| 40 | int ret; |
| 41 | |
| 42 | ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDR, 1, &dev); |
| 43 | if (ret) { |
| 44 | log_debug("cannot find PMIC I2C chip\n"); |
| 45 | return 0; |
| 46 | } |
| 47 | |
| 48 | ret = dm_i2c_read(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1); |
| 49 | if (ret) |
| 50 | return ret; |
| 51 | |
| 52 | data_buffer[0] |= ONOFF_PWR_OFF; |
| 53 | |
| 54 | ret = dm_i2c_write(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1); |
| 55 | if (ret) |
| 56 | return ret; |
| 57 | |
| 58 | /* wait some time and then print error */ |
| 59 | mdelay(5000); |
| 60 | |
| 61 | printf("Failed to power off!!!\n"); |
| 62 | return 1; |
| 63 | } |
| 64 | #endif |
| 65 | |
| 66 | /* |
| 67 | * Routine: pinmux_init |
| 68 | * Description: Do individual peripheral pinmux configs |
| 69 | */ |
| 70 | void pinmux_init(void) |
| 71 | { |
| 72 | pinmux_config_pingrp_table(tegra3_x3_pinmux_common, |
| 73 | ARRAY_SIZE(tegra3_x3_pinmux_common)); |
| 74 | |
| 75 | #ifdef CONFIG_DEVICE_P880 |
| 76 | pinmux_config_pingrp_table(tegra3_p880_pinmux, |
| 77 | ARRAY_SIZE(tegra3_p880_pinmux)); |
| 78 | #endif |
| 79 | |
| 80 | #ifdef CONFIG_DEVICE_P895 |
| 81 | pinmux_config_pingrp_table(tegra3_p895_pinmux, |
| 82 | ARRAY_SIZE(tegra3_p895_pinmux)); |
| 83 | #endif |
| 84 | } |
| 85 | |
| 86 | #ifdef CONFIG_MMC_SDHCI_TEGRA |
| 87 | static void max77663_voltage_init(void) |
| 88 | { |
| 89 | struct udevice *dev; |
| 90 | int ret; |
| 91 | |
| 92 | ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDR, 1, &dev); |
| 93 | if (ret) { |
| 94 | log_debug("cannot find PMIC I2C chip\n"); |
| 95 | return; |
| 96 | } |
| 97 | |
| 98 | /* 0x60 for 1.8v, bit7:0 = voltage */ |
| 99 | ret = dm_i2c_reg_write(dev, MAX77663_REG_SD2, 0x60); |
| 100 | if (ret) |
| 101 | log_debug("vdd_1v8_vio set failed: %d\n", ret); |
| 102 | |
| 103 | /* 0xF2 for 3.30v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ |
| 104 | ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO2, 0xF2); |
| 105 | if (ret) |
| 106 | log_debug("avdd_usb set failed: %d\n", ret); |
| 107 | |
| 108 | /* 0xEC for 3.00v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ |
| 109 | ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO3, 0xEC); |
| 110 | if (ret) |
| 111 | log_debug("vdd_usd set failed: %d\n", ret); |
| 112 | |
| 113 | /* 0xE9 for 2.85v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ |
| 114 | ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO5, 0xE9); |
| 115 | if (ret) |
| 116 | log_debug("vcore_emmc set failed: %d\n", ret); |
| 117 | } |
| 118 | |
| 119 | /* |
| 120 | * Routine: pin_mux_mmc |
| 121 | * Description: setup the MMC muxes, power rails, etc. |
| 122 | */ |
| 123 | void pin_mux_mmc(void) |
| 124 | { |
| 125 | /* Bring up uSD and eMMC power */ |
| 126 | max77663_voltage_init(); |
| 127 | } |
| 128 | #endif /* MMC */ |
| 129 | |
| 130 | int nvidia_board_init(void) |
| 131 | { |
| 132 | /* Set up panel bridge clocks */ |
| 133 | clock_start_periph_pll(PERIPH_ID_EXTPERIPH3, CLOCK_ID_PERIPH, |
| 134 | 24 * 1000000); |
| 135 | clock_external_output(3); |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
| 141 | int ft_board_setup(void *blob, struct bd_info *bd) |
| 142 | { |
| 143 | /* First 3 bytes refer to LG vendor */ |
| 144 | u8 btmacaddr[6] = { 0x00, 0x00, 0x00, 0xD0, 0xC9, 0x88 }; |
| 145 | |
| 146 | /* Generate device 3 bytes based on chip sd */ |
| 147 | u64 bt_device = tegra_chip_uid() >> 24ull; |
| 148 | |
| 149 | btmacaddr[0] = (bt_device >> 1 & 0x0F) | |
| 150 | (bt_device >> 5 & 0xF0); |
| 151 | btmacaddr[1] = (bt_device >> 11 & 0x0F) | |
| 152 | (bt_device >> 17 & 0xF0); |
| 153 | btmacaddr[2] = (bt_device >> 23 & 0x0F) | |
| 154 | (bt_device >> 29 & 0xF0); |
| 155 | |
| 156 | /* Set BT MAC address */ |
| 157 | fdt_find_and_setprop(blob, "/serial@70006200/bluetooth", |
| 158 | "local-bd-address", btmacaddr, 6, 1); |
| 159 | |
| 160 | /* Remove TrustZone nodes */ |
| 161 | fdt_del_node_and_alias(blob, "/firmware"); |
| 162 | fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | #endif |
| 167 | |
| 168 | void nvidia_board_late_init(void) |
| 169 | { |
| 170 | char serialno_str[17]; |
| 171 | |
| 172 | /* Set chip id as serialno */ |
| 173 | sprintf(serialno_str, "%016llx", tegra_chip_uid()); |
| 174 | env_set("serial#", serialno_str); |
| 175 | env_set("platform", "Tegra 3 T30"); |
| 176 | } |