blob: b5cece08ac3d40389071391d3fae620a998f7cbe [file] [log] [blame]
Eugen Hristev0de35aa2020-03-10 11:56:38 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Microchip Technology, Inc.
4 * Eugen Hristev <eugen.hristev@microchip.com>
5 */
6
7#include <common.h>
8#include <debug_uart.h>
9#include <init.h>
10#include <asm/io.h>
11#include <asm/arch/at91_common.h>
12#include <asm/arch/atmel_pio4.h>
13#include <asm/arch/clk.h>
14#include <asm/arch/gpio.h>
15#include <asm/arch/sama7g5.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19int board_late_init(void)
20{
21 return 0;
22}
23
24#if (IS_ENABLED(CONFIG_DEBUG_UART_BOARD_INIT))
25static void board_uart0_hw_init(void)
26{
27 /* FLEXCOM3 IO0 */
28 atmel_pio4_set_f_periph(AT91_PIO_PORTD, 17, ATMEL_PIO_PUEN_MASK);
29 /* FLEXCOM3 IO1 */
30 atmel_pio4_set_f_periph(AT91_PIO_PORTD, 16, 0);
31
32 at91_periph_clk_enable(ATMEL_ID_FLEXCOM3);
33}
34
35void board_debug_uart_init(void)
36{
37 board_uart0_hw_init();
38}
39#endif
40
41int board_early_init_f(void)
42{
43#if (IS_ENABLED(CONFIG_DEBUG_UART))
44 debug_uart_init();
45#endif
46 return 0;
47}
48
Eugen Hristevb9a9f4a2020-07-31 15:20:56 +030049#define MAC24AA_MAC_OFFSET 0xfa
50
51#if (IS_ENABLED(CONFIG_MISC_INIT_R))
52int misc_init_r(void)
53{
54#if (IS_ENABLED(CONFIG_I2C_EEPROM))
55 at91_set_ethaddr(MAC24AA_MAC_OFFSET);
56 at91_set_eth1addr(MAC24AA_MAC_OFFSET);
57#endif
58 return 0;
59}
60#endif
61
Eugen Hristev0de35aa2020-03-10 11:56:38 +020062int board_init(void)
63{
64 /* address of boot parameters */
65 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
66
67 return 0;
68}
69
70int dram_init(void)
71{
72 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
73 CONFIG_SYS_SDRAM_SIZE);
74 return 0;
75}
76