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git01.mediatek.com / filogic / uboot / 0c16945b9a3db1932450a29ed236cbf65ce5454f / . / arch / arm / dts / rk3399-rock-pi-4.dts
blob: 4a543f2117d4212b9e26578a64db9ad982ff5c59 [file] [log] [blame]
Jagan Teki0c169452019-05-17 15:59:41 +0530[diff] [blame^]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/linux-event-codes.h>
9#include <dt-bindings/pwm/pwm.h>
10#include "rk3399.dtsi"
11#include "rk3399-opp.dtsi"
12
13/ {
14 model = "Radxa ROCK Pi 4";
15 compatible = "radxa,rockpi4", "rockchip,rk3399";
16
17 chosen {
18 stdout-path = "serial2:1500000n8";
19 };
20
21 clkin_gmac: external-gmac-clock {
22 compatible = "fixed-clock";
23 clock-frequency = <125000000>;
24 clock-output-names = "clkin_gmac";
25 #clock-cells = <0>;
26 };
27
28 vcc12v_dcin: dc-12v {
29 compatible = "regulator-fixed";
30 regulator-name = "vcc12v_dcin";
31 regulator-always-on;
32 regulator-boot-on;
33 regulator-min-microvolt = <12000000>;
34 regulator-max-microvolt = <12000000>;
35 };
36
37 vcc5v0_sys: vcc-sys {
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0_sys";
40 regulator-always-on;
41 regulator-boot-on;
42 regulator-min-microvolt = <5000000>;
43 regulator-max-microvolt = <5000000>;
44 vin-supply = <&vcc12v_dcin>;
45 };
46
47 vcc3v3_pcie: vcc3v3-pcie-regulator {
48 compatible = "regulator-fixed";
49 enable-active-high;
50 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&pcie_pwr_en>;
53 regulator-name = "vcc3v3_pcie";
54 regulator-always-on;
55 regulator-boot-on;
56 vin-supply = <&vcc5v0_sys>;
57 };
58
59 vcc3v3_sys: vcc3v3-sys {
60 compatible = "regulator-fixed";
61 regulator-name = "vcc3v3_sys";
62 regulator-always-on;
63 regulator-boot-on;
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 vin-supply = <&vcc5v0_sys>;
67 };
68
69 vcc5v0_host: vcc5v0-host-regulator {
70 compatible = "regulator-fixed";
71 enable-active-high;
72 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&vcc5v0_host_en>;
75 regulator-name = "vcc5v0_host";
76 regulator-always-on;
77 vin-supply = <&vcc5v0_sys>;
78 };
79
80 vcc5v0_typec: vcc5v0-typec-regulator {
81 compatible = "regulator-fixed";
82 enable-active-high;
83 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&vcc5v0_typec_en>;
86 regulator-name = "vcc5v0_typec";
87 regulator-always-on;
88 vin-supply = <&vcc5v0_sys>;
89 };
90
91 vcc_lan: vcc3v3-phy-regulator {
92 compatible = "regulator-fixed";
93 regulator-name = "vcc_lan";
94 regulator-always-on;
95 regulator-boot-on;
96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <3300000>;
98
99 regulator-state-mem {
100 regulator-off-in-suspend;
101 };
102 };
103
104 vdd_log: vdd-log {
105 compatible = "pwm-regulator";
106 pwms = <&pwm2 0 25000 1>;
107 regulator-name = "vdd_log";
108 regulator-always-on;
109 regulator-boot-on;
110 regulator-min-microvolt = <800000>;
111 regulator-max-microvolt = <1400000>;
112 vin-supply = <&vcc5v0_sys>;
113 };
114};
115
116&cpu_l0 {
117 cpu-supply = <&vdd_cpu_l>;
118};
119
120&cpu_l1 {
121 cpu-supply = <&vdd_cpu_l>;
122};
123
124&cpu_l2 {
125 cpu-supply = <&vdd_cpu_l>;
126};
127
128&cpu_l3 {
129 cpu-supply = <&vdd_cpu_l>;
130};
131
132&cpu_b0 {
133 cpu-supply = <&vdd_cpu_b>;
134};
135
136&cpu_b1 {
137 cpu-supply = <&vdd_cpu_b>;
138};
139
140&emmc_phy {
141 status = "okay";
142};
143
144&gmac {
145 assigned-clocks = <&cru SCLK_RMII_SRC>;
146 assigned-clock-parents = <&clkin_gmac>;
147 clock_in_out = "input";
148 phy-supply = <&vcc_lan>;
149 phy-mode = "rgmii";
150 pinctrl-names = "default";
151 pinctrl-0 = <&rgmii_pins>;
152 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
153 snps,reset-active-low;
154 snps,reset-delays-us = <0 10000 50000>;
155 tx_delay = <0x28>;
156 rx_delay = <0x11>;
157 status = "okay";
158};
159
160&hdmi {
161 pinctrl-names = "default";
162 pinctrl-0 = <&hdmi_cec>;
163 status = "okay";
164};
165
166&i2c0 {
167 clock-frequency = <400000>;
168 i2c-scl-rising-time-ns = <168>;
169 i2c-scl-falling-time-ns = <4>;
170 status = "okay";
171
172 rk808: pmic@1b {
173 compatible = "rockchip,rk808";
174 reg = <0x1b>;
175 interrupt-parent = <&gpio1>;
176 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
177 #clock-cells = <1>;
178 clock-output-names = "xin32k", "rk808-clkout2";
179 pinctrl-names = "default";
180 pinctrl-0 = <&pmic_int_l>;
181 rockchip,system-power-controller;
182 wakeup-source;
183
184 vcc1-supply = <&vcc5v0_sys>;
185 vcc2-supply = <&vcc5v0_sys>;
186 vcc3-supply = <&vcc5v0_sys>;
187 vcc4-supply = <&vcc5v0_sys>;
188 vcc6-supply = <&vcc5v0_sys>;
189 vcc7-supply = <&vcc5v0_sys>;
190 vcc8-supply = <&vcc3v3_sys>;
191 vcc9-supply = <&vcc5v0_sys>;
192 vcc10-supply = <&vcc5v0_sys>;
193 vcc11-supply = <&vcc5v0_sys>;
194 vcc12-supply = <&vcc3v3_sys>;
195 vddio-supply = <&vcc_1v8>;
196
197 regulators {
198 vdd_center: DCDC_REG1 {
199 regulator-name = "vdd_center";
200 regulator-always-on;
201 regulator-boot-on;
202 regulator-min-microvolt = <750000>;
203 regulator-max-microvolt = <1350000>;
204 regulator-ramp-delay = <6001>;
205 regulator-state-mem {
206 regulator-off-in-suspend;
207 };
208 };
209
210 vdd_cpu_l: DCDC_REG2 {
211 regulator-name = "vdd_cpu_l";
212 regulator-always-on;
213 regulator-boot-on;
214 regulator-min-microvolt = <750000>;
215 regulator-max-microvolt = <1350000>;
216 regulator-ramp-delay = <6001>;
217 regulator-state-mem {
218 regulator-off-in-suspend;
219 };
220 };
221
222 vcc_ddr: DCDC_REG3 {
223 regulator-name = "vcc_ddr";
224 regulator-always-on;
225 regulator-boot-on;
226 regulator-state-mem {
227 regulator-on-in-suspend;
228 };
229 };
230
231 vcc_1v8: DCDC_REG4 {
232 regulator-name = "vcc_1v8";
233 regulator-always-on;
234 regulator-boot-on;
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <1800000>;
237 regulator-state-mem {
238 regulator-on-in-suspend;
239 regulator-suspend-microvolt = <1800000>;
240 };
241 };
242
243 vcc1v8_codec: LDO_REG1 {
244 regulator-name = "vcc1v8_codec";
245 regulator-always-on;
246 regulator-boot-on;
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <1800000>;
249 regulator-state-mem {
250 regulator-off-in-suspend;
251 };
252 };
253
254 vcc1v8_hdmi: LDO_REG2 {
255 regulator-name = "vcc1v8_hdmi";
256 regulator-always-on;
257 regulator-boot-on;
258 regulator-min-microvolt = <1800000>;
259 regulator-max-microvolt = <1800000>;
260 regulator-state-mem {
261 regulator-off-in-suspend;
262 };
263 };
264
265 vcca_1v8: LDO_REG3 {
266 regulator-name = "vcca_1v8";
267 regulator-always-on;
268 regulator-boot-on;
269 regulator-min-microvolt = <1800000>;
270 regulator-max-microvolt = <1800000>;
271 regulator-state-mem {
272 regulator-on-in-suspend;
273 regulator-suspend-microvolt = <1800000>;
274 };
275 };
276
277 vcc_sdio: LDO_REG4 {
278 regulator-name = "vcc_sdio";
279 regulator-always-on;
280 regulator-boot-on;
281 regulator-min-microvolt = <3000000>;
282 regulator-max-microvolt = <3000000>;
283 regulator-state-mem {
284 regulator-on-in-suspend;
285 regulator-suspend-microvolt = <3000000>;
286 };
287 };
288
289 vcca3v0_codec: LDO_REG5 {
290 regulator-name = "vcca3v0_codec";
291 regulator-always-on;
292 regulator-boot-on;
293 regulator-min-microvolt = <3000000>;
294 regulator-max-microvolt = <3000000>;
295 regulator-state-mem {
296 regulator-off-in-suspend;
297 };
298 };
299
300 vcc_1v5: LDO_REG6 {
301 regulator-name = "vcc_1v5";
302 regulator-always-on;
303 regulator-boot-on;
304 regulator-min-microvolt = <1500000>;
305 regulator-max-microvolt = <1500000>;
306 regulator-state-mem {
307 regulator-on-in-suspend;
308 regulator-suspend-microvolt = <1500000>;
309 };
310 };
311
312 vcc0v9_hdmi: LDO_REG7 {
313 regulator-name = "vcc0v9_hdmi";
314 regulator-always-on;
315 regulator-boot-on;
316 regulator-min-microvolt = <900000>;
317 regulator-max-microvolt = <900000>;
318 regulator-state-mem {
319 regulator-off-in-suspend;
320 };
321 };
322
323 vcc_3v0: LDO_REG8 {
324 regulator-name = "vcc_3v0";
325 regulator-always-on;
326 regulator-boot-on;
327 regulator-min-microvolt = <3000000>;
328 regulator-max-microvolt = <3000000>;
329 regulator-state-mem {
330 regulator-on-in-suspend;
331 regulator-suspend-microvolt = <3000000>;
332 };
333 };
334
335 vcc_cam: SWITCH_REG1 {
336 regulator-name = "vcc_cam";
337 regulator-always-on;
338 regulator-boot-on;
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
341 regulator-state-mem {
342 regulator-off-in-suspend;
343 };
344 };
345
346 vcc_mipi: SWITCH_REG2 {
347 regulator-name = "vcc_mipi";
348 regulator-always-on;
349 regulator-boot-on;
350 regulator-min-microvolt = <3300000>;
351 regulator-max-microvolt = <3300000>;
352 regulator-state-mem {
353 regulator-off-in-suspend;
354 };
355 };
356 };
357 };
358
359 vdd_cpu_b: regulator@40 {
360 compatible = "silergy,syr827";
361 reg = <0x40>;
362 fcs,suspend-voltage-selector = <1>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&vsel1_gpio>;
365 regulator-name = "vdd_cpu_b";
366 regulator-min-microvolt = <712500>;
367 regulator-max-microvolt = <1500000>;
368 regulator-ramp-delay = <1000>;
369 regulator-always-on;
370 regulator-boot-on;
371 vin-supply = <&vcc5v0_sys>;
372
373 regulator-state-mem {
374 regulator-off-in-suspend;
375 };
376 };
377
378 vdd_gpu: regulator@41 {
379 compatible = "silergy,syr828";
380 reg = <0x41>;
381 fcs,suspend-voltage-selector = <1>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&vsel2_gpio>;
384 regulator-name = "vdd_gpu";
385 regulator-min-microvolt = <712500>;
386 regulator-max-microvolt = <1500000>;
387 regulator-ramp-delay = <1000>;
388 regulator-always-on;
389 regulator-boot-on;
390 vin-supply = <&vcc5v0_sys>;
391
392 regulator-state-mem {
393 regulator-off-in-suspend;
394 };
395 };
396};
397
398&i2c1 {
399 i2c-scl-rising-time-ns = <300>;
400 i2c-scl-falling-time-ns = <15>;
401 status = "okay";
402};
403
404&i2c3 {
405 i2c-scl-rising-time-ns = <450>;
406 i2c-scl-falling-time-ns = <15>;
407 status = "okay";
408};
409
410&i2c4 {
411 i2c-scl-rising-time-ns = <600>;
412 i2c-scl-falling-time-ns = <20>;
413 status = "okay";
414};
415
416&i2s0 {
417 rockchip,playback-channels = <8>;
418 rockchip,capture-channels = <8>;
419 status = "okay";
420};
421
422&i2s1 {
423 rockchip,playback-channels = <2>;
424 rockchip,capture-channels = <2>;
425 status = "okay";
426};
427
428&i2s2 {
429 status = "okay";
430};
431
432&io_domains {
433 status = "okay";
434
435 bt656-supply = <&vcc_3v0>;
436 audio-supply = <&vcc_3v0>;
437 sdmmc-supply = <&vcc_sdio>;
438 gpio1830-supply = <&vcc_3v0>;
439};
440
441&pmu_io_domains {
442 status = "okay";
443
444 pmu1830-supply = <&vcc_3v0>;
445};
446
447&pinctrl {
448 pcie {
449 pcie_pwr_en: pcie-pwr-en {
450 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
451 };
452 };
453
454 pmic {
455 pmic_int_l: pmic-int-l {
456 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
457 };
458
459 vsel1_gpio: vsel1-gpio {
460 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
461 };
462
463 vsel2_gpio: vsel2-gpio {
464 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
465 };
466 };
467
468 usb-typec {
469 vcc5v0_typec_en: vcc5v0-typec-en {
470 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
471 };
472 };
473
474 usb2 {
475 vcc5v0_host_en: vcc5v0-host-en {
476 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
477 };
478 };
479};
480
481&pwm2 {
482 status = "okay";
483};
484
485&saradc {
486 status = "okay";
487
488 vref-supply = <&vcc_1v8>;
489};
490
491&sdmmc {
492 bus-width = <4>;
493 cap-mmc-highspeed;
494 cap-sd-highspeed;
495 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
496 disable-wp;
497 max-frequency = <150000000>;
498 pinctrl-names = "default";
499 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
500 status = "okay";
501};
502
503&sdhci {
504 bus-width = <8>;
505 mmc-hs400-1_8v;
506 mmc-hs400-enhanced-strobe;
507 non-removable;
508 status = "okay";
509};
510
511&tcphy0 {
512 status = "okay";
513};
514
515&tcphy1 {
516 status = "okay";
517};
518
519&tsadc {
520 status = "okay";
521
522 /* tshut mode 0:CRU 1:GPIO */
523 rockchip,hw-tshut-mode = <1>;
524 /* tshut polarity 0:LOW 1:HIGH */
525 rockchip,hw-tshut-polarity = <1>;
526};
527
528&u2phy0 {
529 status = "okay";
530
531 u2phy0_otg: otg-port {
532 status = "okay";
533 };
534
535 u2phy0_host: host-port {
536 phy-supply = <&vcc5v0_host>;
537 status = "okay";
538 };
539};
540
541&u2phy1 {
542 status = "okay";
543
544 u2phy1_otg: otg-port {
545 status = "okay";
546 };
547
548 u2phy1_host: host-port {
549 phy-supply = <&vcc5v0_host>;
550 status = "okay";
551 };
552};
553
554&uart2 {
555 status = "okay";
556};
557
558&usb_host0_ehci {
559 status = "okay";
560};
561
562&usb_host0_ohci {
563 status = "okay";
564};
565
566&usb_host1_ehci {
567 status = "okay";
568};
569
570&usb_host1_ohci {
571 status = "okay";
572};
573
574&usbdrd3_0 {
575 status = "okay";
576};
577
578&usbdrd_dwc3_0 {
579 status = "okay";
580 dr_mode = "otg";
581};
582
583&usbdrd3_1 {
584 status = "okay";
585};
586
587&usbdrd_dwc3_1 {
588 status = "okay";
589 dr_mode = "host";
590};
591
592&vopb {
593 status = "okay";
594};
595
596&vopb_mmu {
597 status = "okay";
598};
599
600&vopl {
601 status = "okay";
602};
603
604&vopl_mmu {
605 status = "okay";
606};