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Masahiro Yamada8e0a4502017-05-15 14:26:33 +09001/*
2 * Copyright (C) 2017 Socionext Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamada6ffe71a2017-09-15 21:43:22 +09007#include <linux/bitops.h>
Masahiro Yamada8e0a4502017-05-15 14:26:33 +09008#include <linux/io.h>
9
10#include "../init.h"
Masahiro Yamada6ffe71a2017-09-15 21:43:22 +090011#include "../sc64-regs.h"
Masahiro Yamada8e0a4502017-05-15 14:26:33 +090012
13#define SDCTRL_EMMC_HW_RESET 0x59810280
14
15void uniphier_pxs3_clk_init(void)
16{
Masahiro Yamada6ffe71a2017-09-15 21:43:22 +090017 u32 tmp;
18
19 tmp = readl(SC_RSTCTRL6);
20 tmp |= BIT(8); /* Mali */
21 writel(tmp, SC_RSTCTRL6);
22
23 tmp = readl(SC_CLKCTRL6);
24 tmp |= BIT(8); /* Mali */
25 writel(tmp, SC_CLKCTRL6);
26
Masahiro Yamada8e0a4502017-05-15 14:26:33 +090027 /* TODO: use "mmc-pwrseq-emmc" */
28 writel(1, SDCTRL_EMMC_HW_RESET);
29}